lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 19 Aug 2020 10:36:38 -0700
From:   Rob Clark <robdclark@...il.com>
To:     Doug Anderson <dianders@...omium.org>
Cc:     dri-devel <dri-devel@...ts.freedesktop.org>,
        "list@....net:IOMMU DRIVERS <iommu@...ts.linux-foundation.org>, Joerg
        Roedel <joro@...tes.org>," <iommu@...ts.linux-foundation.org>,
        linux-arm-msm <linux-arm-msm@...r.kernel.org>,
        Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>,
        Will Deacon <will@...nel.org>,
        freedreno <freedreno@...ts.freedesktop.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Sibi Sankar <sibis@...eaurora.org>,
        Vivek Gautam <vivek.gautam@...eaurora.org>,
        Stephen Boyd <swboyd@...omium.org>,
        Robin Murphy <robin.murphy@....com>,
        Joerg Roedel <joro@...tes.org>,
        Jordan Crouse <jcrouse@...eaurora.org>,
        Rob Herring <robh@...nel.org>,
        Rob Clark <robdclark@...omium.org>,
        Rob Herring <robh+dt@...nel.org>,
        "moderated list:ARM SMMU DRIVERS" 
        <linux-arm-kernel@...ts.infradead.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 10/20] dt-bindings: arm-smmu: Add compatible string for
 Adreno GPU SMMU

On Wed, Aug 19, 2020 at 10:03 AM Doug Anderson <dianders@...omium.org> wrote:
>
> Hi,
>
> On Mon, Aug 17, 2020 at 3:03 PM Rob Clark <robdclark@...il.com> wrote:
> >
> > From: Jordan Crouse <jcrouse@...eaurora.org>
> >
> > Every Qcom Adreno GPU has an embedded SMMU for its own use. These
> > devices depend on unique features such as split pagetables,
> > different stall/halt requirements and other settings. Identify them
> > with a compatible string so that they can be identified in the
> > arm-smmu implementation specific code.
> >
> > Signed-off-by: Jordan Crouse <jcrouse@...eaurora.org>
> > Reviewed-by: Rob Herring <robh@...nel.org>
> > Signed-off-by: Rob Clark <robdclark@...omium.org>
> > ---
> >  Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> > index 503160a7b9a0..5ec5d0d691f6 100644
> > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> > @@ -40,6 +40,10 @@ properties:
> >                - qcom,sm8150-smmu-500
> >                - qcom,sm8250-smmu-500
> >            - const: arm,mmu-500
> > +      - description: Qcom Adreno GPUs implementing "arm,smmu-v2"
> > +        items:
> > +          - const: qcom,adreno-smmu
> > +          - const: qcom,smmu-v2
>
> I know I'm kinda late to the game, but this seems weird to me,
> especially given the later patches in the series like:
>
> https://lore.kernel.org/r/20200817220238.603465-19-robdclark@gmail.com
>
> Specifically in that patch you can see that this IOMMU already had a
> compatible string and we're changing it and throwing away the
> model-specific string?  I'm guessing that you're just trying to make
> it easier for code to identify the adreno iommu, but it seems like a
> better way would have been to just add the adreno compatible in the
> middle, like:
>
>       - description: Qcom Adreno GPUs implementing "arm,smmu-v2"
>         items:
>           - enum:
>               - qcom,msm8996-smmu-v2
>               - qcom,msm8998-smmu-v2
>               - qcom,sc7180-smmu-v2
>               - qcom,sdm845-smmu-v2
>         - const: qcom,adreno-smmu
>         - const: qcom,smmu-v2
>
> Then we still have the SoC-specific compatible string in case we need
> it but we also have the generic one?  It also means that we're not
> deleting the old compatible string...

I did bring up the thing about removing the compat string in an
earlier revision of the series.. but then we realized that
qcom,sc7180-smmu-v2 was never actually used anywhere.

But I guess we could:  compatible = "qcom,sc7180-smmu-v2",
"qcom,adreno-smmu", "qcom,smmu-v2";

BR,
-R




>
> -Doug
>
>
> >        - description: Marvell SoCs implementing "arm,mmu-500"
> >          items:
> >            - const: marvell,ap806-smmu-500
> > --
> > 2.26.2
> >

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ