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Message-ID: <dleftjpn7m23j2.fsf%l.stelmach@samsung.com>
Date:   Wed, 19 Aug 2020 15:01:21 +0200
From:   Lukasz Stelmach <l.stelmach@...sung.com>
To:     Krzysztof Kozlowski <krzk@...nel.org>
Cc:     Kukjin Kim <kgene@...nel.org>, Andi Shyti <andi@...zian.org>,
        Mark Brown <broonie@...nel.org>, linux-spi@...r.kernel.org,
        linux-samsung-soc@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        m.szyprowski@...sung.com, b.zolnierkie@...sung.com
Subject: Re: [PATCH 2/8] spi: spi-s3s64xx: Add S3C64XX_SPI_QUIRK_CS_AUTO for
 Exynos3250

It was <2020-08-19 śro 14:39>, when Krzysztof Kozlowski wrote:
> On Wed, Aug 19, 2020 at 02:32:02PM +0200, Łukasz Stelmach wrote:
>> Signed-off-by: Łukasz Stelmach <l.stelmach@...sung.com>
>
> Add a quirk - why?

Because stuff does not work without it and works with it and it is
turned on for other SoCs which have simmilar SPI HW.

> There is here no commit msg, no explanation.

As I wrote in the cover letter, this and previous commits make things
work on Exynos3250 (ARTIK5 precisely). I can't explain why. I read
everything I could about this HW and there were no details about
automatic CS handling other than how to turn it on and off.

>> ---
>>  drivers/spi/spi-s3c64xx.c | 1 +
>>  1 file changed, 1 insertion(+)
>> 
>> diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
>> index fb5e2ba4b6b9..8fe44451d303 100644
>> --- a/drivers/spi/spi-s3c64xx.c
>> +++ b/drivers/spi/spi-s3c64xx.c
>> @@ -1372,6 +1372,7 @@ static struct s3c64xx_spi_port_config exynos4_spi_port_config = {
>>  	.tx_st_done	= 25,
>>  	.high_speed	= true,
>>  	.clk_from_cmu	= true,
>> +	.quirks		=  S3C64XX_SPI_QUIRK_CS_AUTO,
>>  };
>>  
>>  static struct s3c64xx_spi_port_config exynos7_spi_port_config = {
>> -- 
>> 2.26.2
>> 
>

-- 
Łukasz Stelmach
Samsung R&D Institute Poland
Samsung Electronics

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