[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <e089ab71-e203-7d24-c1a5-6213c925b153@linux.intel.com>
Date: Thu, 20 Aug 2020 15:30:10 +0800
From: Dilip Kota <eswara.kota@...ux.intel.com>
To: Rob Herring <robh@...nel.org>, devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>,
linux-pci@...r.kernel.org
Subject: Re: [PATCH] dt-bindings: PCI: intel,lgm-pcie: Fix matching on all
snps,dw-pcie instances
On 8/20/2020 6:20 AM, Rob Herring wrote:
> The intel,lgm-pcie binding is matching on all snps,dw-pcie instances
> which is wrong. Add a custom 'select' entry to fix this.
>
> Fixes: e54ea45a4955 ("dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller")
> Cc: Bjorn Helgaas <bhelgaas@...gle.com>
> Cc: Dilip Kota <eswara.kota@...ux.intel.com>
> Cc: linux-pci@...r.kernel.org
> Signed-off-by: Rob Herring <robh@...nel.org>
> ---
> I'll take this via the DT tree.
>
> Rob
>
> Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml b/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
> index 64b2c64ca806..a1e2be737eec 100644
> --- a/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml
> @@ -9,6 +9,14 @@ title: PCIe RC controller on Intel Gateway SoCs
> maintainers:
> - Dilip Kota <eswara.kota@...ux.intel.com>
>
> +select:
> + properties:
> + compatible:
> + contains:
> + const: intel,lgm-pcie
> + required:
> + - compatible
> +
> properties:
> compatible:
> items:
Reviewed-by: Dilip Kota <eswara.kota@...ux.intel.com>
Regards,
Dilip
Powered by blists - more mailing lists