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Message-ID: <87blizxe3x.fsf@soft-dev15.microsemi.net>
Date: Tue, 25 Aug 2020 11:35:14 +0200
From: Lars Povlsen <lars.povlsen@...rochip.com>
To: Alexandre Belloni <alexandre.belloni@...tlin.com>
CC: Ulf Hansson <ulf.hansson@...aro.org>,
Lars Povlsen <lars.povlsen@...rochip.com>,
Adrian Hunter <adrian.hunter@...el.com>,
"SoC Team" <soc@...nel.org>, Rob Herring <robh+dt@...nel.org>,
"Microchip Linux Driver Support" <UNGLinuxDriver@...rochip.com>,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
DTML <devicetree@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 1/3] dt-bindings: mmc: Add Sparx5 SDHCI controller bindings
Alexandre Belloni writes:
> On 25/08/2020 09:33:45+0200, Ulf Hansson wrote:
>> On Mon, 24 Aug 2020 at 17:10, Lars Povlsen <lars.povlsen@...rochip.com> wrote:
>> >
>> > The Sparx5 SDHCI controller is based on the Designware controller IP.
>> >
>> > Signed-off-by: Lars Povlsen <lars.povlsen@...rochip.com>
>> > ---
>> > .../mmc/microchip,dw-sparx5-sdhci.yaml | 65 +++++++++++++++++++
>> > 1 file changed, 65 insertions(+)
>> > create mode 100644 Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml
>> >
>> > diff --git a/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml b/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml
>> > new file mode 100644
>> > index 0000000000000..55883290543b9
>> > --- /dev/null
>> > +++ b/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml
>> > @@ -0,0 +1,65 @@
>> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> > +%YAML 1.2
>> > +---
>> > +$id: http://devicetree.org/schemas/mmc/microchip,dw-sparx5-sdhci.yaml#
>> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> > +
>> > +title: Microchip Sparx5 Mobile Storage Host Controller Binding
>> > +
>> > +allOf:
>> > + - $ref: "mmc-controller.yaml"
>> > +
>> > +maintainers:
>> > + - Lars Povlsen <lars.povlsen@...rochip.com>
>> > +
>> > +# Everything else is described in the common file
>> > +properties:
>> > + compatible:
>> > + const: microchip,dw-sparx5-sdhci
>> > +
>> > + reg:
>> > + maxItems: 1
>> > +
>> > + interrupts:
>> > + maxItems: 1
>> > +
>> > + clocks:
>> > + maxItems: 1
>> > + description:
>> > + Handle to "core" clock for the sdhci controller.
>> > +
>> > + clock-names:
>> > + items:
>> > + - const: core
>> > +
>> > + microchip,clock-delay:
>> > + description: Delay clock to card to meet setup time requirements.
>> > + Each step increase by 1.25ns.
>> > + $ref: "/schemas/types.yaml#/definitions/uint32"
>> > + minimum: 1
>> > + maximum: 15
>> > +
>> > +required:
>> > + - compatible
>> > + - reg
>> > + - interrupts
>> > + - clocks
>> > + - clock-names
>> > +
>> > +examples:
>> > + - |
>> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> > + #include <dt-bindings/clock/microchip,sparx5.h>
>> > + sdhci0: mmc@...800000 {
>>
>> Nitpick:
>>
>> I think we should use solely "mmc[n]" here. So:
>>
>> mmc0@...800000 {
>>
>> Please update patch3/3 accordingly as well.
>
> This is not what the devicetree specification says. 2.2.2 says that the
> generic name is mmc, not mmc[n]. Since there is a proper unit-address, I
> don't see the need for an index here.
>
Alex,
Yeah, I thought so as well - and the existing DTs have practically all
variations..
Nevertheless, I followed suit since I had to refresh the patch set
anyhow.
Cheers,
---Lars
--
Lars Povlsen,
Microchip
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