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Message-Id: <20200825144710.23584-2-Smita.KoralahalliChannabasappa@amd.com>
Date: Tue, 25 Aug 2020 09:47:09 -0500
From: Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
To: x86@...nel.org, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org, linux-edac@...r.kernel.org,
linux-efi@...r.kernel.org, linux-acpi@...r.kernel.org,
devel@...ica.org
Cc: Borislav Petkov <bp@...en8.de>, Tony Luck <tony.luck@...el.com>,
"Rafael J . Wysocki" <rjw@...ysocki.net>,
Len Brown <len.brown@...el.com>,
Ard Biesheuvel <ardb@...nel.org>,
Yazen Ghannam <yazen.ghannam@....com>,
Smita.KoralahalliChannabasappa@....com
Subject: [PATCH 1/2] cper, apei, mce: Pass x86 CPER through the MCA handling chain
Linux Kernel uses ACPI Boot Error Record Table (BERT) to report fatal
errors that occurred in a previous boot. The MCA errors in the BERT are
reported using the x86 Processor Error Common Platform Error Record (CPER)
format. Currently, the record prints out the raw MSR values and AMD relies
on the raw record to provide MCA information.
Extract the raw MSR values of MCA registers from the BERT and feed it into
the standard mce_log() function through the existing x86/MCA RAS
infrastructure. This will result in better decoding from the EDAC MCE
decoder or the default notifier.
The implementation is SMCA specific as the raw MCA register values are
given in the register offset order of the MCAX address space.
Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
Cc: Borislav Petkov <bp@...en8.de>
Cc: Tony Luck <tony.luck@...el.com>
Cc: "Rafael J. Wysocki" <rjw@...ysocki.net>
Cc: Len Brown <len.brown@...el.com>
Cc: Ard Biesheuvel <ardb@...nel.org>
Cc: Yazen Ghannam <yazen.ghannam@....com>
Cc: x86@...nel.org
Cc: linux-kernel@...r.kernel.org
Cc: linux-pm@...r.kernel.org
Cc: linux-edac@...r.kernel.org
Cc: linux-efi@...r.kernel.org
Cc: linux-acpi@...r.kernel.org
Cc: devel@...ica.org
---
arch/x86/include/asm/mce.h | 5 +++++
arch/x86/kernel/acpi/apei.c | 10 +++++++++
arch/x86/kernel/cpu/mce/apei.c | 38 +++++++++++++++++++++++++++++++++
drivers/firmware/efi/cper-x86.c | 10 +++++----
include/acpi/apei.h | 2 ++
5 files changed, 61 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index cf503824529c..dbcb6bd80b7c 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -291,6 +291,11 @@ struct cper_sec_mem_err;
extern void apei_mce_report_mem_error(int corrected,
struct cper_sec_mem_err *mem_err);
+struct cper_ia_proc_ctx;
+struct cper_sec_proc_ia;
+int apei_mce_report_x86_error(const struct cper_sec_proc_ia *proc,
+ struct cper_ia_proc_ctx *ctx_info);
+
/*
* Enumerate new IP types and HWID values in AMD processors which support
* Scalable MCA.
diff --git a/arch/x86/kernel/acpi/apei.c b/arch/x86/kernel/acpi/apei.c
index c22fb55abcfd..053d6e994e87 100644
--- a/arch/x86/kernel/acpi/apei.c
+++ b/arch/x86/kernel/acpi/apei.c
@@ -43,3 +43,13 @@ void arch_apei_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
apei_mce_report_mem_error(sev, mem_err);
#endif
}
+
+int arch_apei_report_x86_error(const struct cper_sec_proc_ia *proc,
+ struct cper_ia_proc_ctx *ctx_info)
+{
+ int err = -EINVAL;
+#ifdef CONFIG_X86_MCE
+ err = apei_mce_report_x86_error(proc, ctx_info);
+#endif
+ return err;
+}
diff --git a/arch/x86/kernel/cpu/mce/apei.c b/arch/x86/kernel/cpu/mce/apei.c
index af8d37962586..d7f405e55d31 100644
--- a/arch/x86/kernel/cpu/mce/apei.c
+++ b/arch/x86/kernel/cpu/mce/apei.c
@@ -51,6 +51,44 @@ void apei_mce_report_mem_error(int severity, struct cper_sec_mem_err *mem_err)
}
EXPORT_SYMBOL_GPL(apei_mce_report_mem_error);
+int apei_mce_report_x86_error(const struct cper_sec_proc_ia *proc,
+ struct cper_ia_proc_ctx *ctx_info)
+{
+ const u64 *i_mce = ((const void *) (ctx_info + 1));
+ unsigned int cpu;
+ struct mce m;
+
+ if (!boot_cpu_has(X86_FEATURE_SMCA))
+ return -EINVAL;
+
+ mce_setup(&m);
+
+ m.extcpu = -1;
+ m.socketid = -1;
+
+ for_each_possible_cpu(cpu) {
+ if (cpu_data(cpu).initial_apicid == proc->lapic_id) {
+ m.extcpu = cpu;
+ m.socketid = cpu_data(m.extcpu).phys_proc_id;
+ break;
+ }
+ }
+
+ m.apicid = proc->lapic_id;
+ m.bank = (ctx_info->msr_addr >> 4) & 0xFF;
+ m.status = *i_mce;
+ m.addr = *(i_mce + 1);
+ m.misc = *(i_mce + 2);
+ /* Skipping MCA_CONFIG */
+ m.ipid = *(i_mce + 4);
+ m.synd = *(i_mce + 5);
+
+ mce_log(&m);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(apei_mce_report_x86_error);
+
#define CPER_CREATOR_MCE \
GUID_INIT(0x75a574e3, 0x5052, 0x4b29, 0x8a, 0x8e, 0xbe, 0x2c, \
0x64, 0x90, 0xb8, 0x9d)
diff --git a/drivers/firmware/efi/cper-x86.c b/drivers/firmware/efi/cper-x86.c
index 2531de49f56c..6622e9824416 100644
--- a/drivers/firmware/efi/cper-x86.c
+++ b/drivers/firmware/efi/cper-x86.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
// Copyright (C) 2018, Advanced Micro Devices, Inc.
-#include <linux/cper.h>
+#include <acpi/apei.h>
/*
* We don't need a "CPER_IA" prefix since these are all locally defined.
@@ -347,9 +347,11 @@ void cper_print_proc_ia(const char *pfx, const struct cper_sec_proc_ia *proc)
ctx_info->mm_reg_addr);
}
- printk("%sRegister Array:\n", newpfx);
- print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, groupsize,
- (ctx_info + 1), ctx_info->reg_arr_size, 0);
+ if (arch_apei_report_x86_error(proc, ctx_info)) {
+ printk("%sRegister Array:\n", newpfx);
+ print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, groupsize,
+ (ctx_info + 1), ctx_info->reg_arr_size, 0);
+ }
ctx_info = (struct cper_ia_proc_ctx *)((long)ctx_info + size);
}
diff --git a/include/acpi/apei.h b/include/acpi/apei.h
index 680f80960c3d..e8ab17395887 100644
--- a/include/acpi/apei.h
+++ b/include/acpi/apei.h
@@ -51,6 +51,8 @@ int erst_clear(u64 record_id);
int arch_apei_enable_cmcff(struct acpi_hest_header *hest_hdr, void *data);
void arch_apei_report_mem_error(int sev, struct cper_sec_mem_err *mem_err);
+int arch_apei_report_x86_error(const struct cper_sec_proc_ia *proc,
+ struct cper_ia_proc_ctx *ctx_info);
#endif
#endif
--
2.17.1
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