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Date: Wed, 26 Aug 2020 20:49:06 +0800 From: Hector Yuan <hector.yuan@...iatek.com> To: Rob Herring <robh@...nel.org> CC: <linux-mediatek@...ts.infradead.org>, <linux-arm-kernel@...ts.infradead.org>, <linux-pm@...r.kernel.org>, <devicetree@...r.kernel.org>, "Rafael J. Wysocki" <rjw@...ysocki.net>, "Viresh Kumar" <viresh.kumar@...aro.org>, Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>, Bjorn Andersson <bjorn.andersson@...aro.org>, Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>, Vinod Koul <vkoul@...nel.org>, Arnd Bergmann <arnd@...db.de>, Anson Huang <Anson.Huang@....com>, Geert Uytterhoeven <geert+renesas@...der.be>, "Olof Johansson" <olof@...om.net>, <linux-kernel@...r.kernel.org>, <wsd_upstream@...iatek.com> Subject: Re: [PATCH v2 2/2] dt-bindings: cpufreq: add bindings for MediaTek cpufreq HW On Mon, 2020-08-24 at 20:04 -0600, Rob Herring wrote: > On Thu, Aug 13, 2020 at 03:07:55PM +0800, Hector Yuan wrote: > > From: "Hector.Yuan" <hector.yuan@...iatek.com> > > > > Add devicetree bindings for MediaTek HW driver. > > > > Signed-off-by: Hector.Yuan <hector.yuan@...iatek.com> > > --- > > .../bindings/cpufreq/cpufreq-mediatek-hw.yaml | 61 ++++++++++++++++++++ > > 1 file changed, 61 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml > > > > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml > > new file mode 100644 > > index 0000000..59bb24e > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml > > @@ -0,0 +1,61 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: MediaTek's CPUFREQ Bindings > > + > > +maintainers: > > + - Hector Yuan <hector.yuan@...iatek.com> > > + > > +description: > > + CPUFREQ HW is a hardware engine used by MediaTek > > + SoCs to manage frequency in hardware. It is capable of controlling frequency > > + for multiple clusters. > > + > > +properties: > > + compatible: > > + const: mediatek,cpufreq-hw > > + > > + reg: > > + minItems: 1 > > + maxItems: 2 > > + description: | > > + Addresses and sizes for the memory of the HW bases in each frequency domain. > > + > > + reg-names: > > + items: > > + - const: "freq-domain0" > > + - const: "freq-domain1" > > Not all that useful of a name given it's based on the index. Let me explain this index is about to map cpus to each frequency control domain. Will update details usage in V3. Thank you. > > + description: | > > + Frequency domain name. > > + > > + "#freq-domain-cells": > > + const: 1 > > + description: | > > + Number of cells in a freqency domain specifier. > > What's this for? > Like the previous mentioned, this is for index mapping. will update in V3. Thank you. > > + > > +required: > > + - compatible > > + - reg > > + - reg-names > > + - "#freq-domain-cells" > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + cpufreq_hw: cpufreq@...c00 { > > + compatible = "mediatek,cpufreq-hw"; > > + reg = <0 0x11bc10 0 0x8c>, > > + <0 0x11bca0 0 0x8c>; > > + reg-names = "freq-domain0", "freq-domain1"; > > + #freq-domain-cells = <1>; > > + }; > > + }; > > + > > -- > > 1.7.9.5
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