lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d433e8a47d721a65903db68c38eb1c337c81e395.camel@ew.tq-group.com>
Date:   Wed, 26 Aug 2020 15:13:22 +0200
From:   Matthias Schiffer <matthias.schiffer@...tq-group.com>
To:     Fabio Estevam <festevam@...il.com>
Cc:     Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        NXP Linux Team <linux-imx@....com>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: (EXT) Re: (EXT) Re: (EXT) Re: (EXT) Re: (EXT) Re: [PATCH 2/2]
 ARM: dts: imx6qdl: tqma6: minor fixes

On Wed, 2020-08-26 at 10:01 -0300, Fabio Estevam wrote:
> On Wed, Aug 26, 2020 at 8:54 AM Matthias Schiffer
> <matthias.schiffer@...tq-group.com> wrote:
> 
> > Before 8cdcd8aeee281, num_chipselect was set to 3 for spi0 and to 1
> > for
> > spi1 in arch/arm/mach-imx/mach-mx31lite.c. My understanding is that
> > it
> > would make sense to add this as num-cs to
> > arch/arm/boot/dts/imx31-lite.dts.
> 
> Or just pass cs-gpios instead?

Using GPIOs for chipselect would require different pinmuxing. Also, why
use GPIOs, when the SPI controller has this built in?

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ