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Message-ID: <0525ead5-ae53-e047-97fa-ac245846d605@broadcom.com>
Date: Fri, 28 Aug 2020 10:09:04 -0700
From: Ray Jui <ray.jui@...adcom.com>
To: Andre Przywara <andre.przywara@....com>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org
Cc: Guenter Roeck <linux@...ck-us.net>,
Wim Van Sebroeck <wim@...ux-watchdog.org>,
Viresh Kumar <vireshk@...nel.org>,
linux-watchdog@...r.kernel.org, linux-kernel@...r.kernel.org,
Ray Jui <rjui@...adcom.com>,
Scott Branden <sbranden@...adcom.com>,
Florian Fainelli <f.fainelli@...il.com>,
bcm-kernel-feedback-list@...adcom.com
Subject: Re: [PATCH 08/10] ARM: dts: Cygnus: Fix SP805 clocks
On 8/28/2020 6:06 AM, Andre Przywara wrote:
> The SP805 DT binding requires two clocks to be specified, but the
> Broadcom Cygnus DT currently only specifies one clock.
>
> In practice, Linux would pick a clock named "apb_pclk" for the bus
> clock, and the Linux and U-Boot SP805 driver would use the first clock
> to derive the actual watchdog counter frequency.
>
> Since currently both are the very same clock, we can just double the
> clock reference, and add the correct clock-names, to match the binding.
>
> Signed-off-by: Andre Przywara <andre.przywara@....com>
> ---
> arch/arm/boot/dts/bcm-cygnus.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
> index 35bdd0969f0a..dacaef2c14ca 100644
> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
> @@ -234,8 +234,8 @@
> compatible = "arm,sp805" , "arm,primecell";
> reg = <0x18009000 0x1000>;
> interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&axi81_clk>;
> - clock-names = "apb_pclk";
> + clocks = <&axi81_clk>, <&axi81_clk>;
> + clock-names = "wdog_clk", "apb_pclk";
> };
>
> gpio_ccm: gpio@...0a000 {
>
Reviewed-by: Ray Jui <ray.jui@...adcom.com>
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