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Message-ID: <20200901165001.GJ5561@gaia>
Date:   Tue, 1 Sep 2020 17:50:02 +0100
From:   Catalin Marinas <catalin.marinas@....com>
To:     Ingo Molnar <mingo@...nel.org>
Cc:     Chen Zhou <chenzhou10@...wei.com>, will@...nel.org,
        james.morse@....com, tglx@...utronix.de, mingo@...hat.com,
        dyoung@...hat.com, bhe@...hat.com, corbet@....net,
        John.P.donnelly@...cle.com, prabhakar.pkin@...il.com,
        bhsharma@...hat.com, horms@...ge.net.au, robh+dt@...nel.org,
        arnd@...db.de, nsaenzjulienne@...e.de,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        kexec@...ts.infradead.org, linux-doc@...r.kernel.org,
        guohanjun@...wei.com, xiexiuqi@...wei.com, huawei.libin@...wei.com,
        wangkefeng.wang@...wei.com
Subject: Re: [PATCH v11 2/5] x86: kdump: move reserve_crashkernel_low() into
 crash_core.c

On Thu, Aug 06, 2020 at 03:36:27PM +0200, Ingo Molnar wrote:
> 
> * Chen Zhou <chenzhou10@...wei.com> wrote:
> 
> > In preparation for supporting reserve_crashkernel_low in arm64 as
> > x86_64 does, move reserve_crashkernel_low() into kernel/crash_core.c.
> > 
> > BTW, move x86_64 CRASH_ALIGN to 2M suggested by Dave. CONFIG_PHYSICAL_ALIGN
> > can be selected from 2M to 16M, move to the same as arm64.
> > 
> > Signed-off-by: Chen Zhou <chenzhou10@...wei.com>
> > ---
> >  arch/x86/include/asm/kexec.h | 24 ++++++++++
> >  arch/x86/kernel/setup.c      | 86 +++---------------------------------
> >  include/linux/crash_core.h   |  3 ++
> >  include/linux/kexec.h        |  2 -
> >  kernel/crash_core.c          | 74 +++++++++++++++++++++++++++++++
> >  kernel/kexec_core.c          | 17 -------
> >  6 files changed, 107 insertions(+), 99 deletions(-)
> 
> Since the changes are centered around arm64, I suppose the arm64 tree 
> will carry this patchset?
> 
> Assuming that this is a 100% invariant moving of code that doesn't 
> regress on x86:
> 
>   Acked-by: Ingo Molnar <mingo@...nel.org>

Thanks Ingo. The only difference I see is that CRASH_ALIGN has been
reduced to 2M here from 16M for x86. Would this break configs that have
PHYSICAL_ALIGN > 2M?

-- 
Catalin

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