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Message-ID: <202009011750.QpFhi8Ex%lkp@intel.com>
Date:   Tue, 1 Sep 2020 17:11:47 +0800
From:   kernel test robot <lkp@...el.com>
To:     ricky_wu@...ltek.com, arnd@...db.de, gregkh@...uxfoundation.org,
        ulf.hansson@...aro.org, bhelgaas@...gle.com,
        rui_feng@...lsil.com.cn, vailbhavgupta40@...ail.com,
        linux-pci@...r.kernel.org, puranjay12@...il.com,
        linux-kernel@...r.kernel.org
Cc:     kbuild-all@...ts.01.org, clang-built-linux@...glegroups.com
Subject: Re: [PATCH v2] misc: rtsx: add power saving function and bios guide
 options

Hi,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on char-misc/char-misc-testing]
[also build test WARNING on soc/for-next linus/master v5.9-rc3 next-20200828]
[cannot apply to linux/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/ricky_wu-realtek-com/misc-rtsx-add-power-saving-function-and-bios-guide-options/20200901-145147
base:   https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git dd5597245d35cfbb0890b8a868028aa1d2018701
config: arm-randconfig-r003-20200901 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project c10e63677f5d20f18010f8f68c631ddc97546f7d)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install arm cross compiling tool for clang build
        # apt-get install binutils-arm-linux-gnueabi
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>

All warnings (new ones prefixed by >>):

>> drivers/misc/cardreader/rts5249.c:174:16: warning: result of comparison of constant 1024 with expression of type 'u8' (aka 'unsigned char') is always true [-Wtautological-constant-out-of-range-compare]
           for (j = 0; j < 1024; j++) {
                       ~ ^ ~~~~
   drivers/misc/cardreader/rts5249.c:190:18: warning: result of comparison of constant 1024 with expression of type 'u8' (aka 'unsigned char') is always true [-Wtautological-constant-out-of-range-compare]
                           for (j = 0; j < 1024; j++) {
                                       ~ ^ ~~~~
   drivers/misc/cardreader/rts5249.c:215:17: warning: result of comparison of constant 1024 with expression of type 'u8' (aka 'unsigned char') is always true [-Wtautological-constant-out-of-range-compare]
                   for (j = 0; j < 1024; j++) {
                               ~ ^ ~~~~
   3 warnings generated.

# https://github.com/0day-ci/linux/commit/4304cb88130927a0a107aa87d999fe82e3153139
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review ricky_wu-realtek-com/misc-rtsx-add-power-saving-function-and-bios-guide-options/20200901-145147
git checkout 4304cb88130927a0a107aa87d999fe82e3153139
vim +174 drivers/misc/cardreader/rts5249.c

   154	
   155	static void rts52xa_save_content_from_efuse(struct rtsx_pcr *pcr)
   156	{
   157		u8 cnt, sv;
   158		u8 j = 0;
   159		u8 tmp;
   160		u8 val;
   161		int i;
   162	
   163		rtsx_pci_write_register(pcr, RTS524A_PME_FORCE_CTL,
   164					REG_EFUSE_BYPASS | REG_EFUSE_POR, REG_EFUSE_POR);
   165		udelay(1);
   166	
   167		pcr_dbg(pcr, "Enable efuse por!");
   168		pcr_dbg(pcr, "save efuse to autoload");
   169	
   170		rtsx_pci_write_register(pcr, RTS525A_EFUSE_ADD, REG_EFUSE_ADD_MASK, 0x00);
   171		rtsx_pci_write_register(pcr, RTS525A_EFUSE_CTL,
   172					REG_EFUSE_ENABLE | REG_EFUSE_MODE, REG_EFUSE_ENABLE);
   173		/* Wait transfer end */
 > 174		for (j = 0; j < 1024; j++) {
   175			rtsx_pci_read_register(pcr, RTS525A_EFUSE_CTL, &tmp);
   176			if ((tmp & 0x80) == 0)
   177				break;
   178		}
   179		rtsx_pci_read_register(pcr, RTS525A_EFUSE_DATA, &val);
   180		cnt = val & 0x0F;
   181		sv = val & 0x10;
   182	
   183		if (sv) {
   184			for (i = 0; i < 4; i++) {
   185				rtsx_pci_write_register(pcr, RTS525A_EFUSE_ADD,
   186					REG_EFUSE_ADD_MASK, 0x04 + i);
   187				rtsx_pci_write_register(pcr, RTS525A_EFUSE_CTL,
   188					REG_EFUSE_ENABLE | REG_EFUSE_MODE, REG_EFUSE_ENABLE);
   189				/* Wait transfer end */
   190				for (j = 0; j < 1024; j++) {
   191					rtsx_pci_read_register(pcr, RTS525A_EFUSE_CTL, &tmp);
   192					if ((tmp & 0x80) == 0)
   193						break;
   194				}
   195				rtsx_pci_read_register(pcr, RTS525A_EFUSE_DATA, &val);
   196				rtsx_pci_write_register(pcr, 0xFF04 + i, 0xFF, val);
   197			}
   198		} else {
   199			rtsx_pci_write_register(pcr, 0xFF04, 0xFF, (u8)PCI_VID(pcr));
   200			rtsx_pci_write_register(pcr, 0xFF05, 0xFF, (u8)(PCI_VID(pcr) >> 8));
   201			rtsx_pci_write_register(pcr, 0xFF06, 0xFF, (u8)PCI_PID(pcr));
   202			rtsx_pci_write_register(pcr, 0xFF07, 0xFF, (u8)(PCI_PID(pcr) >> 8));
   203		}
   204	
   205		for (i = 0; i < cnt * 4; i++) {
   206			if (sv)
   207				rtsx_pci_write_register(pcr, RTS525A_EFUSE_ADD,
   208					REG_EFUSE_ADD_MASK, 0x08 + i);
   209			else
   210				rtsx_pci_write_register(pcr, RTS525A_EFUSE_ADD,
   211					REG_EFUSE_ADD_MASK, 0x04 + i);
   212			rtsx_pci_write_register(pcr, RTS525A_EFUSE_CTL,
   213					REG_EFUSE_ENABLE | REG_EFUSE_MODE, REG_EFUSE_ENABLE);
   214			/* Wait transfer end */
   215			for (j = 0; j < 1024; j++) {
   216				rtsx_pci_read_register(pcr, RTS525A_EFUSE_CTL, &tmp);
   217				if ((tmp & 0x80) == 0)
   218					break;
   219			}
   220			rtsx_pci_read_register(pcr, RTS525A_EFUSE_DATA, &val);
   221			rtsx_pci_write_register(pcr, 0xFF08 + i, 0xFF, val);
   222		}
   223		rtsx_pci_write_register(pcr, 0xFF00, 0xFF, (cnt & 0x7F) | 0x80);
   224		rtsx_pci_write_register(pcr, RTS524A_PME_FORCE_CTL,
   225			REG_EFUSE_BYPASS | REG_EFUSE_POR, REG_EFUSE_BYPASS);
   226		pcr_dbg(pcr, "Disable efuse por!");
   227	}
   228	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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