linux-kernel - Re: [PATCH 2/4] perf vendor events amd: Add ITLB Instruction Fetch Hits event for zen1

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Message-ID: <CAP-5=fW84gvGr+RxovDrFaRozHEY-_9mV2K-_bG04pmg8SJGvw@mail.gmail.com>
Date:   Wed, 2 Sep 2020 23:03:38 -0700
From:   Ian Rogers <irogers@...gle.com>
To:     Kim Phillips <kim.phillips@....com>
Cc:     Arnaldo Carvalho de Melo <acme@...hat.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Vijay Thakkar <vijaythakkar@...com>,
        Andi Kleen <ak@...ux.intel.com>,
        John Garry <john.garry@...wei.com>,
        Kan Liang <kan.liang@...ux.intel.com>,
        Yunfeng Ye <yeyunfeng@...wei.com>,
        Jin Yao <yao.jin@...ux.intel.com>,
        Martin Liška <mliska@...e.cz>,
        Borislav Petkov <bp@...e.de>, Jon Grimm <jon.grimm@....com>,
        Martin Jambor <mjambor@...e.cz>,
        Michael Petlan <mpetlan@...hat.com>,
        William Cohen <wcohen@...hat.com>,
        Stephane Eranian <eranian@...gle.com>,
        linux-perf-users <linux-perf-users@...r.kernel.org>,
        LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/4] perf vendor events amd: Add ITLB Instruction Fetch
 Hits event for zen1

On Tue, Sep 1, 2020 at 3:10 PM Kim Phillips <kim.phillips@....com> wrote:
>
> The ITLB Instruction Fetch Hits event isn't documented even in
> later zen1 PPRs, but it seems to count correctly on zen1 hardware.
>
> Add it to zen1 group so zen1 users can use the upcoming IC Fetch Miss
> Ratio Metric.
>
> The IF1G, 1IF2M, IF4K (Instruction fetches to a 1 GB, 2 MB, and 4K page)
> unit masks are not added because unlike zen2 hardware, zen1 hardware
> counts all its unit masks with a 0 unit mask according to the old
> convention:
>
> zen1$ perf stat -e cpu/event=0x94/,cpu/event=0x94,umask=0xff/ sleep 1
>
>  Performance counter stats for 'sleep 1':
>
>            211,318      cpu/event=0x94/u
>            211,318      cpu/event=0x94,umask=0xff/u
>
> Rome/zen2:
>
> zen2$ perf stat -e cpu/event=0x94/,cpu/event=0x94,umask=0xff/ sleep 1
>
>  Performance counter stats for 'sleep 1':
>
>                  0      cpu/event=0x94/u
>            190,744      cpu/event=0x94,umask=0xff/u
>
> Signed-off-by: Kim Phillips <kim.phillips@....com>

Acked-by: Ian Rogers <irogers@...gle.com>

Thanks,
Ian

> Cc: Peter Zijlstra <peterz@...radead.org>
> Cc: Ingo Molnar <mingo@...hat.com>
> Cc: Arnaldo Carvalho de Melo <acme@...nel.org>
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
> Cc: Jiri Olsa <jolsa@...hat.com>
> Cc: Namhyung Kim <namhyung@...nel.org>
> Cc: Vijay Thakkar <vijaythakkar@...com>
> Cc: Andi Kleen <ak@...ux.intel.com>
> Cc: John Garry <john.garry@...wei.com>
> Cc: Kan Liang <kan.liang@...ux.intel.com>
> Cc: Yunfeng Ye <yeyunfeng@...wei.com>
> Cc: Jin Yao <yao.jin@...ux.intel.com>
> Cc: "Martin Liška" <mliska@...e.cz>
> Cc: Borislav Petkov <bp@...e.de>
> Cc: Jon Grimm <jon.grimm@....com>
> Cc: Martin Jambor <mjambor@...e.cz>
> Cc: Michael Petlan <mpetlan@...hat.com>
> Cc: William Cohen <wcohen@...hat.com>
> Cc: Stephane Eranian <eranian@...gle.com>
> Cc: Ian Rogers <irogers@...gle.com>
> Cc: linux-perf-users@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> ---
>  tools/perf/pmu-events/arch/x86/amdzen1/branch.json | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/tools/perf/pmu-events/arch/x86/amdzen1/branch.json b/tools/perf/pmu-events/arch/x86/amdzen1/branch.json
> index a9943eeb8d6b..4ceb67a0db21 100644
> --- a/tools/perf/pmu-events/arch/x86/amdzen1/branch.json
> +++ b/tools/perf/pmu-events/arch/x86/amdzen1/branch.json
> @@ -19,5 +19,10 @@
>      "EventName": "bp_de_redirect",
>      "EventCode": "0x91",
>      "BriefDescription": "Decoder Overrides Existing Branch Prediction (speculative)."
> +  },
> +  {
> +    "EventName": "bp_l1_tlb_fetch_hit",
> +    "EventCode": "0x94",
> +    "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB."
>    }
>  ]
> --
> 2.27.0
>