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Message-ID: <CAMuHMdXWxYgAZx7bCET-U2S9KUo2tAT2gqKn3W5LTTtH-oRS0Q@mail.gmail.com>
Date: Thu, 3 Sep 2020 14:42:27 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
linux-clk <linux-clk@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Biju Das <biju.das.jz@...renesas.com>,
Prabhakar <prabhakar.csengg@...il.com>
Subject: Re: [PATCH v2] clk: renesas: r8a7742-cpg-mssr: Add clk entry for VSPR
On Mon, Aug 31, 2020 at 8:03 PM Lad Prabhakar
<prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> Add clock entry 130 for VSPR (VSP for Resizing) module, so that this module
> can be used on R8A7742 (RZ/G1H) SoC.
>
> Alongside rename clock entry "vsp1-sy" to "vsps" (VSP Standard), so that
> VSP1 clock names are in sync.
>
> Note: The entry for VSPR clock was accidentally dropped from RZ/G manual
> when all the information related to RT were removed.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@...renesas.com>
> ---
> v1->v2
> * Alongside renamed "vsp1-sy" to "vsps"
> * Updated commit message
Thanks for the update!
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in clk-renesas-for-v5.10.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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