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Message-ID: <CALCETrVY6XXUkePL0D0gmGEkq_oB2Ly_uXo6QQUz1v0H7sf_-g@mail.gmail.com>
Date: Thu, 3 Sep 2020 07:54:05 -0700
From: Andy Lutomirski <luto@...nel.org>
To: Dave Hansen <dave.hansen@...el.com>
Cc: "Yu, Yu-cheng" <yu-cheng.yu@...el.com>,
Jann Horn <jannh@...gle.com>,
"the arch/x86 maintainers" <x86@...nel.org>,
"H. Peter Anvin" <hpa@...or.com>,
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Linux API <linux-api@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>,
Andy Lutomirski <luto@...nel.org>,
Balbir Singh <bsingharora@...il.com>,
Borislav Petkov <bp@...en8.de>,
Cyrill Gorcunov <gorcunov@...il.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
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Weijiang Yang <weijiang.yang@...el.com>
Subject: Re: [PATCH v11 6/9] x86/cet: Add PTRACE interface for CET
On Thu, Sep 3, 2020 at 7:27 AM Dave Hansen <dave.hansen@...el.com> wrote:
>
> On 9/2/20 9:35 PM, Andy Lutomirski wrote:
> >>>>>> + fpu__prepare_read(fpu);
> >>>>>> + cetregs = get_xsave_addr(&fpu->state.xsave, XFEATURE_CET_USER);
> >>>>>> + if (!cetregs)
> >>>>>> + return -EFAULT;
> >>>>> Can this branch ever be hit without a kernel bug? If yes, I think
> >>>>> -EFAULT is probably a weird error code to choose here. If no, this
> >>>>> should probably use WARN_ON(). Same thing in cetregs_set().
> >>>> When a thread is not CET-enabled, its CET state does not exist. I looked at EFAULT, and it means "Bad address". Maybe this can be ENODEV, which means "No such device"?
> > Having read the code, I’m unconvinced. It looks like a get_xsave_addr() failure means “state not saved; task sees INIT state”. So *maybe* it’s reasonable -ENODEV this, but I’m not really convinced. I tend to think we should return the actual INIT state and that we should permit writes and handle them correctly.
>
> PTRACE is asking for access to the values in the *registers*, not for
> the value in the kernel XSAVE buffer. We just happen to only have the
> kernel XSAVE buffer around.
>
> If we want to really support PTRACE we have to allow the registers to be
> get/set, regardless of what state they are in, INIT state or not. So,
> yeah I agree with Andy.
I think the core dump code gets here, too, so the values might be in
registers as well. I hope that fpu__prepare_read() does the right
thing in this case.
--Andy
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