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Message-ID: <21491d05-6306-0a6f-58a7-8bf29feae8c7@intel.com>
Date: Thu, 3 Sep 2020 09:25:54 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: Andy Lutomirski <luto@...nel.org>
Cc: "Yu, Yu-cheng" <yu-cheng.yu@...el.com>,
Jann Horn <jannh@...gle.com>,
the arch/x86 maintainers <x86@...nel.org>,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
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"open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
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Linux API <linux-api@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>,
Balbir Singh <bsingharora@...il.com>,
Borislav Petkov <bp@...en8.de>,
Cyrill Gorcunov <gorcunov@...il.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Eugene Syromiatnikov <esyr@...hat.com>,
Florian Weimer <fweimer@...hat.com>,
"H.J. Lu" <hjl.tools@...il.com>, Jonathan Corbet <corbet@....net>,
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Weijiang Yang <weijiang.yang@...el.com>
Subject: Re: [PATCH v11 6/9] x86/cet: Add PTRACE interface for CET
On 9/3/20 9:15 AM, Andy Lutomirski wrote:
> On Thu, Sep 3, 2020 at 9:12 AM Dave Hansen <dave.hansen@...el.com> wrote:
>>
>> On 9/3/20 9:09 AM, Yu, Yu-cheng wrote:
>>> If the debugger is going to write an MSR, only in the third case would
>>> this make a slight sense. For example, if the system has CET enabled,
>>> but the task does not have CET enabled, and GDB is writing to a CET MSR.
>>> But still, this is strange to me.
>>
>> If this is strange, then why do we even _implement_ writes?
>
> Well, if gdb wants to force a tracee to return early from a function,
> wouldn't it want the ability to modify SSP?
That's true.
Yu-cheng, can you take a look through and see for the other setregs
users what they do for logically crazy, strange things? Is there
precedent for refusing a write which is possible but illogical or
strange? If so, which error code do they use?
Taking the config register out of the init state is illogical, as is
writing to SSP while the config register is in its init state.
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