linux-kernel - [PATCH 0/4] soc: bcm: brcmstb: BIUCTRL updates

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Date:   Fri,  4 Sep 2020 13:50:50 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     linux-arm-kernel@...ts.infradead.org
Cc:     Florian Fainelli <f.fainelli@...il.com>,
        bcm-kernel-feedback-list@...adcom.com (maintainer:BROADCOM BCM7XXX ARM
        ARCHITECTURE), linux-kernel@...r.kernel.org (open list)
Subject: [PATCH 0/4] soc: bcm: brcmstb: BIUCTRL updates

This patch series adds support for two new STB chips: 72164 and 72165
and allows them to be tuned the same way other Brahma-B53 chips are.

The last two changes are some minor configuration changes to the
read-ahead cache logic to improve performance for Cortex-A72 based
systems.

Florian Fainelli (4):
  soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72164
  soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72165
  soc: bcm: brcmstb: biuctrl: Change RAC prefetch distance from +/-1 to
    +/- 2
  soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4
    consecutive lines

 drivers/soc/bcm/brcmstb/biuctrl.c | 30 +++++++++++++++++++++++++-----
 1 file changed, 25 insertions(+), 5 deletions(-)

-- 
2.25.1