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Message-ID: <38c8ba6d1ca4e982626bbaefbec620fdce2cd024.camel@pengutronix.de>
Date: Fri, 04 Sep 2020 17:04:04 +0200
From: Lucas Stach <l.stach@...gutronix.de>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Russell King <linux+etnaviv@...linux.org.uk>,
Christian Gmeiner <christian.gmeiner@...il.com>,
Lee Jones <lee.jones@...aro.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Sam Ravnborg <sam@...nborg.org>, Li Yang <leoyang.li@....com>,
Robert Chiras <robert.chiras@....com>,
Matti Vaittinen <matti.vaittinen@...rohmeurope.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org, etnaviv@...ts.freedesktop.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 10/13] arm64: dts: imx8mq: Add missing interrupts to GPC
On Fr, 2020-09-04 at 16:53 +0200, Krzysztof Kozlowski wrote:
> The i.MX General Power Controller v2 device node was missing interrupts
> property necessary to route its interrupt to GIC. This also fixes the
> dbts_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@...a0000:
> {'compatible': ... '$nodename': ['gpc@...a0000']} is not valid under any of the given schemas
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@...a0000: 'interrupts' is a required property
>
> Fixes: fdbcc04da246 ("arm64: dts: imx8mq: add GPC power domains")
> Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org>
Reviewed-by: Lucas Stach <l.stach@...gutronix.de>
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index aad3b9f2f35c..5e0e7d0f1bc4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -623,6 +623,7 @@
> gpc: gpc@...a0000 {
> compatible = "fsl,imx8mq-gpc";
> reg = <0x303a0000 0x10000>;
> + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-parent = <&gic>;
> interrupt-controller;
> #interrupt-cells = <3>;
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