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Message-ID: <20200907061126.GA14999@infradead.org>
Date:   Mon, 7 Sep 2020 07:11:26 +0100
From:   Christoph Hellwig <hch@...radead.org>
To:     Yash Shah <yash.shah@...ive.com>
Cc:     robh+dt@...nel.org, palmer@...belt.com, paul.walmsley@...ive.com,
        bp@...en8.de, mchehab@...nel.org, tony.luck@...el.com,
        devicetree@...r.kernel.org, aou@...s.berkeley.edu,
        linux-kernel@...r.kernel.org, sachin.ghadi@...ive.com,
        rrichter@...vell.com, james.morse@....com,
        linux-riscv@...ts.infradead.org, linux-edac@...r.kernel.org
Subject: Re: [PATCH v2 2/3] soc: sifive: Add SiFive specific Cadence DDR
 controller driver

On Mon, Sep 07, 2020 at 11:17:58AM +0530, Yash Shah wrote:
> Add a driver to manage the Cadence DDR controller present on SiFive SoCs
> At present the driver manages the EDAC feature of the DDR controller.
> Additional features may be added to the driver in future to control
> other aspects of the DDR controller.

So if this is a generic(ish) Cadence IP block shouldn't it be named
Cadence and made generic?  Or is the frontend somehow SiFive specific?

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