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Message-ID: <20200907110207.GA7573@e121166-lin.cambridge.arm.com>
Date: Mon, 7 Sep 2020 12:02:07 +0100
From: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To: Ansuel Smith <ansuelsmth@...il.com>
Cc: Stanimir Varbanov <svarbanov@...sol.com>, stable@...r.kernel.org,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] PCI: qcom: Make sure PCIe is reset before init for rev
2.1.0
On Tue, Sep 01, 2020 at 02:49:54PM +0200, Ansuel Smith wrote:
> Qsdk U-Boot can incorrectly leave the PCIe interface in an undefined
> state if bootm command is used instead of bootipq. This is caused by the
> not deinit of PCIe when bootm is called. Reset the PCIe before init
> anyway to fix this U-Boot bug.
>
> Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
> Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")
> Cc: stable@...r.kernel.org # v4.19+
> ---
> drivers/pci/controller/dwc/pcie-qcom.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
Applied to pci/qcom, thanks.
Lorenzo
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 3aac77a295ba..82336bbaf8dc 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -302,6 +302,9 @@ static void qcom_pcie_deinit_2_1_0(struct qcom_pcie *pcie)
> reset_control_assert(res->por_reset);
> reset_control_assert(res->ext_reset);
> reset_control_assert(res->phy_reset);
> +
> + writel(1, pcie->parf + PCIE20_PARF_PHY_CTRL);
> +
> regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
> }
>
> @@ -314,6 +317,16 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie)
> u32 val;
> int ret;
>
> + /* reset the PCIe interface as uboot can leave it undefined state */
> + reset_control_assert(res->pci_reset);
> + reset_control_assert(res->axi_reset);
> + reset_control_assert(res->ahb_reset);
> + reset_control_assert(res->por_reset);
> + reset_control_assert(res->ext_reset);
> + reset_control_assert(res->phy_reset);
> +
> + writel(1, pcie->parf + PCIE20_PARF_PHY_CTRL);
> +
> ret = regulator_bulk_enable(ARRAY_SIZE(res->supplies), res->supplies);
> if (ret < 0) {
> dev_err(dev, "cannot enable regulators\n");
> --
> 2.27.0
>
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