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Date: Mon, 7 Sep 2020 13:18:27 +0100
From: Andre Przywara <andre.przywara@....com>
To: soc@...nel.org
Cc: Rob Herring <robh@...nel.org>, devicetree@...r.kernel.org,
Wei Xu <xuwei5@...ilicon.com>, Chanho Min <chanho.min@....com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v3 2/6] ARM: dts: nspire: Fix SP804 users
Even though the SP804 binding allows to specify only one clock, the
primecell driver requires a named clock to activate the bus clock.
Specify the one clock three times and provide some clock-names, to
make the DT match the SP804 and primecell binding.
Signed-off-by: Andre Przywara <andre.przywara@....com>
---
arch/arm/boot/dts/nspire.dtsi | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi
index d9a0fd7524dc..90e033d9141f 100644
--- a/arch/arm/boot/dts/nspire.dtsi
+++ b/arch/arm/boot/dts/nspire.dtsi
@@ -145,15 +145,19 @@
timer0: timer@...C0000 {
reg = <0x900C0000 0x1000>;
-
- clocks = <&timer_clk>;
+ clocks = <&timer_clk>, <&timer_clk>,
+ <&timer_clk>;
+ clock-names = "timer0clk", "timer1clk",
+ "apb_pclk";
};
timer1: timer@...D0000 {
reg = <0x900D0000 0x1000>;
interrupts = <19>;
-
- clocks = <&timer_clk>;
+ clocks = <&timer_clk>, <&timer_clk>,
+ <&timer_clk>;
+ clock-names = "timer0clk", "timer1clk",
+ "apb_pclk";
};
watchdog: watchdog@...60000 {
--
2.17.1
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