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Message-ID: <20200907165613.79f44c58@xps13>
Date: Mon, 7 Sep 2020 16:56:13 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: "Ramuthevar,Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org,
devicetree@...r.kernel.org, richard@....at, vigneshr@...com,
arnd@...db.de, brendanhiggins@...gle.com, tglx@...utronix.de,
boris.brezillon@...labora.com, anders.roxell@...aro.org,
masonccyang@...c.com.tw, robh+dt@...nel.org,
linux-mips@...r.kernel.org, hauke.mehrtens@...el.com,
andriy.shevchenko@...el.com, cheol.yong.kim@...el.com,
qi-ming.wu@...el.com
Subject: Re: [RESEND PATCH v12 2/2] mtd: rawnand: Add NAND controller
support on Intel LGM SoC
Miquel Raynal <miquel.raynal@...tlin.com> wrote on Mon, 7 Sep 2020
15:20:25 +0200:
> Hi Murugan,
>
> A few more comments below, but I guess the driver looks better now.
>
> > +struct ebu_nand_controller {
> > + struct nand_controller controller;
> > + struct nand_chip chip;
> > + struct device *dev;
> > + void __iomem *ebu;
> > + void __iomem *hsnand;
> > + struct dma_chan *dma_tx;
> > + struct dma_chan *dma_rx;
> > + struct completion dma_access_complete;
> > + unsigned long clk_rate;
> > + struct clk *clk;
> > + u32 nd_para0;
> > + u8 cs_num;
> > + struct ebu_nand_cs cs[MAX_CS];
> > +};
> > +
> > +static inline struct ebu_nand_controller *nand_to_ebu(struct nand_chip *chip)
> > +{
> > + return container_of(chip, struct ebu_nand_controller, chip);
> > +}
> > +
> > +static u8 ebu_nand_readb(struct nand_chip *chip)
>
> Can't you prefix with intel_ instead of ebu_ ?
Actually not, as the IP is shared with MIPS IIUC, just ignore this
comment.
Thanks,
Miquèl
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