lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Mon, 7 Sep 2020 17:25:45 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Jonathan Marek <jonathan@...ek.ca>, linux-arm-msm@...r.kernel.org
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        "open list:COMMON CLK FRAMEWORK" <linux-clk@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>,
        Stephen Boyd <sboyd@...nel.org>,
        Taniya Das <tdas@...eaurora.org>
Subject: Re: [PATCH v2 0/7] SM8150 and SM8250 dispcc drivers

On 04/09/2020 01:26, Jonathan Marek wrote:
> Add display clock drivers required to get DSI and DP displays working on
> SM8150 and SM8250 SoCs.
> 
> Derived from downstream drivers. Notable changes compared to downstream:
>   - EDP clks removed (nothing uses these even in downstream it seems)
>   - freq_tbl values for dp_link clk is in Hz and not kHz


On SM8250:
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>

> 
> v2:
>   - updated dts example to reflect the change (first patch)
>   - updated config_ctl_hi1_val in sm8250 dispcc to latest downstream
> 
> Jonathan Marek (7):
>    dt-bindings: clock: sdm845-dispcc: same name for dp_phy clocks as
>      sc7180
>    arm64: dts: qcom: sdm845-dispcc: same name for dp_phy clocks as sc7180
>    dt-bindings: clock: combine qcom,sdm845-dispcc and qcom,sc7180-dispcc
>    dt-bindings: clock: Introduce QCOM SM8150 display clock bindings
>    dt-bindings: clock: Introduce QCOM SM8250 display clock bindings
>    clk: qcom: Add display clock controller driver for SM8150
>    clk: qcom: Add display clock controller driver for SM8250
> 
>   ...om,sdm845-dispcc.yaml => qcom,dispcc.yaml} |   30 +-
>   .../bindings/clock/qcom,sc7180-dispcc.yaml    |   86 --
>   arch/arm64/boot/dts/qcom/sdm845.dtsi          |    4 +-
>   drivers/clk/qcom/Kconfig                      |   18 +
>   drivers/clk/qcom/Makefile                     |    2 +
>   drivers/clk/qcom/dispcc-sm8150.c              | 1152 +++++++++++++++++
>   drivers/clk/qcom/dispcc-sm8250.c              | 1100 ++++++++++++++++
>   .../dt-bindings/clock/qcom,dispcc-sm8150.h    |   69 +
>   .../dt-bindings/clock/qcom,dispcc-sm8250.h    |   66 +
>   9 files changed, 2428 insertions(+), 99 deletions(-)
>   rename Documentation/devicetree/bindings/clock/{qcom,sdm845-dispcc.yaml => qcom,dispcc.yaml} (75%)
>   delete mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml
>   create mode 100644 drivers/clk/qcom/dispcc-sm8150.c
>   create mode 100644 drivers/clk/qcom/dispcc-sm8250.c
>   create mode 100644 include/dt-bindings/clock/qcom,dispcc-sm8150.h
>   create mode 100644 include/dt-bindings/clock/qcom,dispcc-sm8250.h
> 


-- 
With best wishes
Dmitry

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ