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Message-Id: <1599536605-4243-1-git-send-email-mansur@codeaurora.org>
Date:   Tue,  8 Sep 2020 09:13:25 +0530
From:   Mansur Alisha Shaik <mansur@...eaurora.org>
To:     linux-media@...r.kernel.org, stanimir.varbanov@...aro.org
Cc:     linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        vgarodia@...eaurora.org,
        Mansur Alisha Shaik <mansur@...eaurora.org>
Subject: [PATCH 0/2] Venus - change clk enable, disable order and change bw values

The intention of this patchset is to correct clock enable and disable
order and vote for venus-ebi and cpucfg paths with average bandwidht
instad of peakbandwidht since with current implementation we are seeing
"video_cc_venus_ctl_axi_clk status stuck at 'off' " warnings and XO-SD
failures while streaming.

Mansur Alisha Shaik (2):
  venus: core: change clk enable and disable order in resume and suspend
  venus: core: vote for video-mem icc path and change avg, peak bw

 drivers/media/platform/qcom/venus/core.c | 23 +++++++++++++++++------
 1 file changed, 17 insertions(+), 6 deletions(-)

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
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