linux-kernel - Re: [PATCH v2 2/3] soc: sifive: Add SiFive specific Cadence DDR controller driver

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Date:   Wed, 9 Sep 2020 07:00:45 +0100
From:   Christoph Hellwig <hch@...radead.org>
To:     Palmer Dabbelt <palmer@...belt.com>
Cc:     Christoph Hellwig <hch@...radead.org>, dkangude@...ence.com,
        yash.shah@...ive.com, robh+dt@...nel.org,
        Paul Walmsley <paul.walmsley@...ive.com>, bp@...en8.de,
        mchehab@...nel.org, tony.luck@...el.com,
        devicetree@...r.kernel.org, aou@...s.berkeley.edu,
        linux-kernel@...r.kernel.org, sachin.ghadi@...ive.com,
        rrichter@...vell.com, james.morse@....com,
        linux-riscv@...ts.infradead.org, linux-edac@...r.kernel.org
Subject: Re: [PATCH v2 2/3] soc: sifive: Add SiFive specific Cadence DDR
 controller driver

On Tue, Sep 08, 2020 at 08:12:16PM -0700, Palmer Dabbelt wrote:
> I don't know enough about the block to know if the subtle difference in
> register names/offsets means.  They look properly jumbled up (ie, not just an
> offset), so maybe there's just different versions or that's the SiFive-specific
> part I had bouncing around my head?  Either way, it seems like one driver with
> some simple configuration could handle both of these -- either sticking the
> offsets in the DT (if they're going to be different everywhere) or by coming up
> with some version sort of thing (if there's a handful of these).

regmap can be used to handle non-uniform register layouts for the same
functionality.