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Message-ID: <CACPK8Xe0WqmyXOHdxw=OWbFEzHew7F2aBQ9B5EPRJfDhj=vhmw@mail.gmail.com>
Date: Thu, 10 Sep 2020 01:52:36 +0000
From: Joel Stanley <joel@....id.au>
To: Andrew Jeffery <andrew@...id.au>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
Linus Walleij <linus.walleij@...aro.org>,
johnny_huang@...eedtech.com,
linux-aspeed <linux-aspeed@...ts.ozlabs.org>,
OpenBMC Maillist <openbmc@...ts.ozlabs.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/3] pinctrl: aspeed: Use the right pinconf mask
On Wed, 9 Sep 2020 at 11:43, Andrew Jeffery <andrew@...id.au> wrote:
>
> The Aspeed pinconf data structures are split into 'conf' and 'map'
> types, where the 'conf' struct defines which register and bitfield to
> manipulate, while the 'map' struct defines what value to write to
> the register and bitfield.
>
> Both structs have a mask member, and the wrong mask was being used to
> tell the regmap which bits to update.
>
> A todo is to look at whether we can remove the mask from the 'map'
> struct.
>
> Cc: Johnny Huang <johnny_huang@...eedtech.com>
> Fixes: 5f52c853847f ("pinctrl: aspeed: Use masks to describe pinconf bitfields")
> Signed-off-by: Andrew Jeffery <andrew@...id.au>
Owch.
Reviewed-by: Joel Stanley <joel@....id.au>
> ---
> drivers/pinctrl/aspeed/pinctrl-aspeed.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> index d8972911d505..e03ee78b2434 100644
> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> @@ -534,7 +534,7 @@ int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
> val = pmap->val << __ffs(pconf->mask);
>
> rc = regmap_update_bits(pdata->scu, pconf->reg,
> - pmap->mask, val);
> + pconf->mask, val);
>
> if (rc < 0)
> return rc;
> --
> 2.25.1
>
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