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Message-ID: <CALCETrV+zLzKvmkJSyXVqVw6FREC__sMXrv2rygruSq3ZAwtiQ@mail.gmail.com>
Date:   Wed, 9 Sep 2020 16:56:46 -0700
From:   Andy Lutomirski <luto@...nel.org>
To:     Matthew Garrett <mjg59@...gle.com>
Cc:     Borislav Petkov <bp@...en8.de>,
        James Bottomley <James.Bottomley@...senpartnership.com>,
        Sultan Alsawaf <sultan@...neltoast.com>,
        "Jason A. Donenfeld" <Jason@...c4.com>,
        Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
        kitsunyan <kitsunyan@...mail.cc>,
        "Brown, Len" <len.brown@...el.com>, X86 ML <x86@...nel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH] x86/msr: do not warn on writes to OC_MAILBOX

On Tue, Sep 8, 2020 at 3:32 PM Matthew Garrett <mjg59@...gle.com> wrote:
>
> On Tue, Sep 8, 2020 at 1:35 PM Andy Lutomirski <luto@...capital.net> wrote:
>
> > Undervolting is a bit different. It’s a genuinely useful configuration that can affect system stability.  In general, I think it should be allowed, and it should have a real driver in tree.
>
> Agree that this should be a proper driver rather than permitting
> arbitrary poking (especially if this isn't an architecturally defined
> MSR - there's no guarantee that it'll have the same functionality
> everywhere).

After looking at the code for intel-undervolt a bit, that definitely
needs kernel or even firmware support.  That MSR really is a mailbox.
You write commands to it and read responses.  There's no way that user
code can have adequate locking.

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