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Message-ID: <20200911213356.GC4110@zn.tnic>
Date:   Fri, 11 Sep 2020 23:33:56 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Krish Sadhukhan <krish.sadhukhan@...cle.com>
Cc:     kvm@...r.kernel.org, pbonzini@...hat.com, jmattson@...gle.com,
        tglx@...utronix.de, mingo@...hat.com, x86@...nel.org,
        sean.j.christopherson@...el.com, vkuznets@...hat.com,
        wanpengli@...cent.com, joro@...tes.org,
        dave.hansen@...ux.intel.com, luto@...nel.org, peterz@...radead.org,
        linux-kernel@...r.kernel.org, hpa@...or.com,
        Tom Lendacky <thomas.lendacky@....com>
Subject: Re: [PATCH 2/4 v3] x86: AMD: Add hardware-enforced cache coherency
 as a CPUID feature

+ Tom.

On Fri, Sep 11, 2020 at 07:25:59PM +0000, Krish Sadhukhan wrote:
> +#define X86_FEATURE_HW_CACHE_COHERENCY (11*32+ 7) /* AMD hardware-enforced cache coherency */

so before you guys paint the bikeshed all kinds of colors :), Tom (CCed)
is digging out the official name. (If it is even uglier, we might keep
on bikeshedding...).

Once you have that, add the "" after the comment - like
X86_FEATURE_FENCE_SWAPGS_USER, for example, so that it doesn't show in
/proc/cpuinfo as luserspace doesn't care about hw coherency between enc
memory.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

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