linux-kernel - RE: [PATCH v3 03/14] dt-bindings: clock: imx8mp: Add ids for the audio shared gate

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Message-ID: <AM6PR04MB49665C7943DC9056A60E4EE880240@AM6PR04MB4966.eurprd04.prod.outlook.com>
Date:   Fri, 11 Sep 2020 07:23:11 +0000
From:   Aisheng Dong <aisheng.dong@....com>
To:     Abel Vesa <abel.vesa@....com>,
        Mike Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <kernel@...gutronix.de>,
        Fabio Estevam <fabio.estevam@....com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Anson Huang <anson.huang@....com>,
        Jacky Bai <ping.bai@....com>, Peng Fan <peng.fan@....com>,
        Andy Duan <fugang.duan@....com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
CC:     dl-linux-imx <linux-imx@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        Abel Vesa <abel.vesa@....com>
Subject: RE: [PATCH v3 03/14] dt-bindings: clock: imx8mp: Add ids for the
 audio shared gate

> From: Abel Vesa <abel.vesa@....com>
> Sent: Tuesday, September 8, 2020 6:25 PM
> 
> All these IDs are for one single HW gate (CCGR101) that is shared between these
> root clocks.
> 
> Signed-off-by: Abel Vesa <abel.vesa@....com>
> Acked-by: Rob Herring <robh@...nel.org>

Seems missed my tag.
So:
Reviewed-by: Dong Aisheng <aisheng.dong@....com>

Regards
Aisheng

> ---
>  include/dt-bindings/clock/imx8mp-clock.h | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/include/dt-bindings/clock/imx8mp-clock.h
> b/include/dt-bindings/clock/imx8mp-clock.h
> index 89c67b7..5fc2c40 100644
> --- a/include/dt-bindings/clock/imx8mp-clock.h
> +++ b/include/dt-bindings/clock/imx8mp-clock.h
> @@ -322,7 +322,17 @@
>  #define IMX8MP_CLK_HSIO_AXI			311
>  #define IMX8MP_CLK_MEDIA_ISP			312
> 
> -#define IMX8MP_CLK_END				313
> +#define IMX8MP_CLK_AUDIO_AHB_ROOT		313
> +#define IMX8MP_CLK_AUDIO_AXI_ROOT		314
> +#define IMX8MP_CLK_SAI1_ROOT			315
> +#define IMX8MP_CLK_SAI2_ROOT			316
> +#define IMX8MP_CLK_SAI3_ROOT			317
> +#define IMX8MP_CLK_SAI5_ROOT			318
> +#define IMX8MP_CLK_SAI6_ROOT			319
> +#define IMX8MP_CLK_SAI7_ROOT			320
> +#define IMX8MP_CLK_PDM_ROOT			321
> +
> +#define IMX8MP_CLK_END				322
> 
>  #define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_IPG		0
>  #define IMX8MP_CLK_AUDIO_BLK_CTL_SAI1_MCLK1		1
> --
> 2.7.4