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Date: Fri, 11 Sep 2020 16:47:02 +0200 From: Marco Felsch <m.felsch@...gutronix.de> To: tudor.ambarus@...rochip.com, miquel.raynal@...tlin.com, richard@....at, vigneshr@...com, sergei.shtylyov@...entembedded.com, boris.brezillon@...labora.com, michael@...le.cc, j.neuschaefer@....net Cc: linux-mtd@...ts.infradead.org, kernel@...gutronix.de, linux-kernel@...r.kernel.org Subject: [PATCH 2/3] mtd: spi-nor: sst: add missing write_enable According the datasheet [1] the WEL is automatically reset after the Byte-Program instruction completion. So if we program the device with byte-size set to 32 and starting from an odd address only the first and the last byte is written. Fix this by (re-)anble the write support for the first SPINOR_OP_AAI_WP sequence. [1] http://ww1.microchip.com/downloads/en/DeviceDoc/20005044C.pdf; "4.3.2 WRITE ENABLE LATCH (WEL)" Signed-off-by: Marco Felsch <m.felsch@...gutronix.de> --- drivers/mtd/spi-nor/sst.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/mtd/spi-nor/sst.c b/drivers/mtd/spi-nor/sst.c index e0af6d25d573..644252e27a2a 100644 --- a/drivers/mtd/spi-nor/sst.c +++ b/drivers/mtd/spi-nor/sst.c @@ -79,6 +79,13 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len, /* Write out most of the data here. */ for (; actual < len - 1; actual += 2) { + /* Enable write support if odd address was written before */ + if (actual == 1) { + ret = spi_nor_write_enable(nor); + if (ret) + goto out; + } + nor->program_opcode = SPINOR_OP_AAI_WP; /* write two bytes. */ -- 2.20.1
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