linux-kernel - RE: [PATCHv7 10/12] arm64: dts: layerscape: Add PCIe EP node for ls1088a

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Message-ID: <HE1PR0402MB33717F631D8243F835918AB084220@HE1PR0402MB3371.eurprd04.prod.outlook.com>
Date:   Sun, 13 Sep 2020 16:26:26 +0000
From:   "Z.q. Hou" <zhiqiang.hou@....com>
To:     Rob Herring <robh@...nel.org>
CC:     "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        Leo Li <leoyang.li@....com>, "kishon@...com" <kishon@...com>,
        "gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
        Roy Zang <roy.zang@....com>,
        "jingoohan1@...il.com" <jingoohan1@...il.com>,
        "andrew.murray@....com" <andrew.murray@....com>,
        Mingkai Hu <mingkai.hu@....com>,
        "M.h. Lian" <minghuan.lian@....com>,
        Xiaowei Bao <xiaowei.bao@....com>
Subject: RE: [PATCHv7 10/12] arm64: dts: layerscape: Add PCIe EP node for
 ls1088a

Hi Rob,

Thanks a lot for your comments!

> -----Original Message-----
> From: Rob Herring <robh@...nel.org>
> Sent: 2020年9月11日 0:48
> To: Z.q. Hou <zhiqiang.hou@....com>
> Cc: linux-pci@...r.kernel.org; devicetree@...r.kernel.org;
> linux-kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> linuxppc-dev@...ts.ozlabs.org; bhelgaas@...gle.com;
> lorenzo.pieralisi@....com; shawnguo@...nel.org; Leo Li
> <leoyang.li@....com>; kishon@...com; gustavo.pimentel@...opsys.com;
> Roy Zang <roy.zang@....com>; jingoohan1@...il.com;
> andrew.murray@....com; Mingkai Hu <mingkai.hu@....com>; M.h. Lian
> <minghuan.lian@....com>; Xiaowei Bao <xiaowei.bao@....com>
> Subject: Re: [PATCHv7 10/12] arm64: dts: layerscape: Add PCIe EP node for
> ls1088a
> 
> On Tue, Aug 11, 2020 at 05:54:39PM +0800, Zhiqiang Hou wrote:
> > From: Xiaowei Bao <xiaowei.bao@....com>
> >
> > Add PCIe EP node for ls1088a to support EP mode.
> >
> > Signed-off-by: Xiaowei Bao <xiaowei.bao@....com>
> > Reviewed-by: Andrew Murray <andrew.murray@....com>
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> > ---
> > V7:
> >  - Rebase the patch without functionality change.
> >
> >  .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31
> +++++++++++++++++++
> >  1 file changed, 31 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > index 169f4742ae3b..915592141f1b 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > @@ -499,6 +499,17 @@
> >  			status = "disabled";
> >  		};
> >
> > +		pcie_ep@...0000 {
> 
> pci-ep@...

The DT node name must be "xxx-xx" style? If yes, the LS1046A EP node also has the name "pcie_ep", it also need to be fixed.

Thanks,
Zhiqiang

> 
> > +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > +			reg = <0x00 0x03400000 0x0 0x00100000
> > +			       0x20 0x00000000 0x8 0x00000000>;
> > +			reg-names = "regs", "addr_space";
> > +			num-ib-windows = <24>;
> > +			num-ob-windows = <128>;
> > +			max-functions = /bits/ 8 <2>;
> > +			status = "disabled";
> > +		};
> > +
> >  		pcie@...0000 {
> >  			compatible = "fsl,ls1088a-pcie";
> >  			reg = <0x00 0x03500000 0x0 0x00100000   /* controller
> registers */
> > @@ -525,6 +536,16 @@
> >  			status = "disabled";
> >  		};
> >
> > +		pcie_ep@...0000 {
> > +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > +			reg = <0x00 0x03500000 0x0 0x00100000
> > +			       0x28 0x00000000 0x8 0x00000000>;
> > +			reg-names = "regs", "addr_space";
> > +			num-ib-windows = <6>;
> > +			num-ob-windows = <8>;
> > +			status = "disabled";
> > +		};
> > +
> >  		pcie@...0000 {
> >  			compatible = "fsl,ls1088a-pcie";
> >  			reg = <0x00 0x03600000 0x0 0x00100000   /* controller
> registers */
> > @@ -551,6 +572,16 @@
> >  			status = "disabled";
> >  		};
> >
> > +		pcie_ep@...0000 {
> > +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > +			reg = <0x00 0x03600000 0x0 0x00100000
> > +			       0x30 0x00000000 0x8 0x00000000>;
> > +			reg-names = "regs", "addr_space";
> > +			num-ib-windows = <6>;
> > +			num-ob-windows = <8>;
> > +			status = "disabled";
> > +		};
> > +
> >  		smmu: iommu@...0000 {
> >  			compatible = "arm,mmu-500";
> >  			reg = <0 0x5000000 0 0x800000>;
> > --
> > 2.17.1
> >