[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <160001658182.6915.9030793517863303185.b4-ty@kernel.org>
Date: Sun, 13 Sep 2020 18:05:15 +0100
From: Marc Zyngier <maz@...nel.org>
To: kvmarm@...ts.cs.columbia.edu,
Alexandru Elisei <alexandru.elisei@....com>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc: will@...nel.org, jason@...edaemon.net, tglx@...utronix.de,
catalin.marinas@....com
Subject: Re: [PATCH v3 0/2] irqchip/gic-v3: Support pseudo-NMIs when SCR_EL3.FIQ == 0
On Sat, 12 Sep 2020 16:37:05 +0100, Alexandru Elisei wrote:
> Trusted Firmware-A's default interrupt routing model is to clear
> SCR_EL3.FIQ, which is the only case that GICv3 doesn't support. This series
> tries to fix that by detecting it at runtime and using a different priority
> value for ICC_PMR_EL1 when masking regular interrupts. As a result, we will
> be able to support pseudo-NMIs on all combinations of GIC security states
> and firmware configurations.
>
> [...]
Applied to irq/irqchip-next, thanks!
[1/2] irqchip/gic-v3: Spell out when pseudo-NMIs are enabled
commit: 4e594ad1068ea1db359d6161f580f03edecf6cb0
[2/2] irqchip/gic-v3: Support pseudo-NMIs when SCR_EL3.FIQ == 0
commit: 336780590990efa69596884114cad3f517b6333b
Cheers,
M.
--
Without deviation from the norm, progress is not possible.
Powered by blists - more mailing lists