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Message-Id: <20200914075202.43341-1-qiang.zhao@nxp.com>
Date: Mon, 14 Sep 2020 15:52:02 +0800
From: Qiang Zhao <qiang.zhao@....com>
To: shawnguo@...nel.org, robh+dt@...nel.org
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Zhao Qiang <qiang.zhao@....com>
Subject: [PATCH] arm64: dts: layerscape: correct watchdog clocks for LS1088A
From: Zhao Qiang <qiang.zhao@....com>
On LS1088A, watchdog clk are divided by 16, correct it in dts.
Signed-off-by: Zhao Qiang <qiang.zhao@....com>
---
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index b0bbe57..2bd0a71 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -712,56 +712,56 @@
cluster1_core0_watchdog: wdt@...0000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster1_core1_watchdog: wdt@...0000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc010000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster1_core2_watchdog: wdt@...0000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc020000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster1_core3_watchdog: wdt@...0000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc030000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core0_watchdog: wdt@...0000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc100000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core1_watchdog: wdt@...0000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc110000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core2_watchdog: wdt@...0000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc120000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
cluster2_core3_watchdog: wdt@...0000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc130000 0x0 0x1000>;
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+ clocks = <&clockgen 4 15>, <&clockgen 4 15>;
clock-names = "apb_pclk", "wdog_clk";
};
--
2.7.4
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