[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20200914103300.5832-1-lzenz@dh-electronics.com>
Date: Mon, 14 Sep 2020 12:33:00 +0200
From: Ludwig Zenz <lzenz@...electronics.com>
To: <alain.volmat@...com>
CC: <alexandre.torgue@...com>, <amelie.delaunay@...com>,
<broonie@...nel.org>, <fabrice.gasnier@...com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-spi@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<mcoquelin.stm32@...il.com>, <marex@...x.de>
Subject: [PATCH v2 2/5] spi: stm32: fix fifo threshold level in case of short transfer
> When transfer is shorter than half of the fifo, set the data packet size
> up to transfer size instead of up to half of the fifo.
> Check also that threshold is set at least to 1 data frame.
Through a git-bisect we have identified this patch as problematic. We have an application that uses a SPI protocol with telegrams of length 2 to 16 bytes. Due to this patch we have errors in the data transfer of the MOSI direction. We use SPI in PIO mode.
Please explain what this patch should improve or what exactly is changed in the behaviour.
best regards,
Ludwig Zenz
Powered by blists - more mailing lists