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Message-ID: <HE1PR0402MB337196C77599A3A5E95E742884200@HE1PR0402MB3371.eurprd04.prod.outlook.com>
Date: Tue, 15 Sep 2020 03:39:24 +0000
From: "Z.q. Hou" <zhiqiang.hou@....com>
To: Rob Herring <robh@...nel.org>
CC: "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
Leo Li <leoyang.li@....com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"M.h. Lian" <minghuan.lian@....com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
Roy Zang <roy.zang@....com>, Mingkai Hu <mingkai.hu@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: RE: [PATCH 3/7] dt-bindings: pci: layerscape-pci: Add a optional
property big-endian
Hi Rob,
Thanks a lot for your review and ack!
Regards,
Zhiqiang
> -----Original Message-----
> From: Rob Herring <robh@...nel.org>
> Sent: 2020年9月15日 9:31
> To: Z.q. Hou <zhiqiang.hou@....com>
> Cc: bhelgaas@...gle.com; linux-kernel@...r.kernel.org;
> shawnguo@...nel.org; Leo Li <leoyang.li@....com>;
> linux-pci@...r.kernel.org; M.h. Lian <minghuan.lian@....com>;
> robh+dt@...nel.org; gustavo.pimentel@...opsys.com;
> lorenzo.pieralisi@....com; Roy Zang <roy.zang@....com>; Mingkai Hu
> <mingkai.hu@....com>; devicetree@...r.kernel.org
> Subject: Re: [PATCH 3/7] dt-bindings: pci: layerscape-pci: Add a optional
> property big-endian
>
> On Mon, 07 Sep 2020 13:37:57 +0800, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@....com>
> >
> > This property is to indicate the endianness when accessing the PEX_LUT
> > and PF register block, so if these registers are implemented in
> > big-endian, specify this property.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@....com>
> > ---
> > Documentation/devicetree/bindings/pci/layerscape-pci.txt | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
>
> Acked-by: Rob Herring <robh@...nel.org>
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