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Message-Id: <20200915140633.702442684@linuxfoundation.org>
Date: Tue, 15 Sep 2020 16:12:28 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Dinh Nguyen <dinguyen@...nel.org>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH 4.19 03/78] ARM: dts: socfpga: fix register entry for timer3 on Arria10
From: Dinh Nguyen <dinguyen@...nel.org>
[ Upstream commit 0ff5a4812be4ebd4782bbb555d369636eea164f7 ]
Fixes the register address for the timer3 entry on Arria10.
Fixes: 475dc86d08de4 ("arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC")
Signed-off-by: Dinh Nguyen <dinguyen@...nel.org>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index ba5657574d9bb..4b1c8bec2de35 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -791,7 +791,7 @@
timer3: timer3@...00100 {
compatible = "snps,dw-apb-timer";
interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0xffd01000 0x100>;
+ reg = <0xffd00100 0x100>;
clocks = <&l4_sys_free_clk>;
clock-names = "timer";
};
--
2.25.1
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