linux-kernel - Re: [PATCH 2/3] spi: spi-geni-qcom: Don't program CS

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Date:   Tue, 15 Sep 2020 16:10:07 +0530
From:   Akash Asthana <akashast@...eaurora.org>
To:     Douglas Anderson <dianders@...omium.org>,
        Mark Brown <broonie@...nel.org>
Cc:     swboyd@...omium.org, Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-spi@...r.kernel.org
Subject: Re: [PATCH 2/3] spi: spi-geni-qcom: Don't program CS_TOGGLE again and
 again


On 9/13/2020 2:38 AM, Douglas Anderson wrote:
> We always toggle the chip select manually in spi-geni-qcom so that we
> can properly implement the Linux API.  There's no reason to program
> this to the hardware on every transfer.  Program it once at init and
> be done with it.
>
> This saves some part of a microsecond of overhead on each transfer.
> While not really noticeable on any real world benchmarks, we might as
> well save the time.

Yeah this is configuration part, can be moved to one time init function, 
as per HPG CS_TOGGLE bit of SPI_TRANS_CFG register is used to instruct 
FW to toggle CS line btw each words. We never came across any 
usecase/slave who needs this.

Reviewed-by: Akash Asthana <akashast@...eaurora.org>

> Signed-off-by: Douglas Anderson <dianders@...omium.org>
> ---
>
>   drivers/spi/spi-geni-qcom.c | 12 +++++++-----
>   1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
> index 7f0bf0dec466..92d88bf85a90 100644
> --- a/drivers/spi/spi-geni-qcom.c
> +++ b/drivers/spi/spi-geni-qcom.c
> @@ -290,6 +290,7 @@ static int spi_geni_init(struct spi_geni_master *mas)
>   {
>   	struct geni_se *se = &mas->se;
>   	unsigned int proto, major, minor, ver;
> +	u32 spi_tx_cfg;
>   
>   	pm_runtime_get_sync(mas->dev);
>   
> @@ -322,6 +323,11 @@ static int spi_geni_init(struct spi_geni_master *mas)
>   
>   	geni_se_select_mode(se, GENI_SE_FIFO);
>   
> +	/* We always control CS manually */
> +	spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG);
> +	spi_tx_cfg &= ~CS_TOGGLE;
> +	writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG);
> +
>   	pm_runtime_put(mas->dev);
>   	return 0;
>   }
> @@ -331,7 +337,7 @@ static void setup_fifo_xfer(struct spi_transfer *xfer,
>   				u16 mode, struct spi_master *spi)
>   {
>   	u32 m_cmd = 0;
> -	u32 spi_tx_cfg, len;
> +	u32 len;
>   	struct geni_se *se = &mas->se;
>   	int ret;
>   
> @@ -350,7 +356,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer,
>   	spin_lock_irq(&mas->lock);
>   	spin_unlock_irq(&mas->lock);
>   
> -	spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG);
>   	if (xfer->bits_per_word != mas->cur_bits_per_word) {
>   		spi_setup_word_len(mas, mode, xfer->bits_per_word);
>   		mas->cur_bits_per_word = xfer->bits_per_word;
> @@ -364,8 +369,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer,
>   	mas->tx_rem_bytes = 0;
>   	mas->rx_rem_bytes = 0;
>   
> -	spi_tx_cfg &= ~CS_TOGGLE;
> -
>   	if (!(mas->cur_bits_per_word % MIN_WORD_LEN))
>   		len = xfer->len * BITS_PER_BYTE / mas->cur_bits_per_word;
>   	else
> @@ -384,7 +387,6 @@ static void setup_fifo_xfer(struct spi_transfer *xfer,
>   		writel(len, se->base + SE_SPI_RX_TRANS_LEN);
>   		mas->rx_rem_bytes = xfer->len;
>   	}
> -	writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG);
>   
>   	/*
>   	 * Lock around right before we start the transfer since our

-- 
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