lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 16 Sep 2020 10:45:36 -0500
From:   Nishanth Menon <nm@...com>
To:     Peter Rosin <peda@...ntia.se>
CC:     Roger Quadros <rogerq@...com>, <t-kristo@...com>,
        <robh+dt@...nel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <nsekhar@...com>,
        <kishon@...com>
Subject: Re: [PATCH v3 1/6] dt-bindings: mux-j7200-wiz: Add lane function
 defines

On 06:52-20200916, Peter Rosin wrote:
> Hi,
> 
> Sorry for the delay.
> 
> On 2020-09-15 13:20, Roger Quadros wrote:
> > Each SERDES lane mux can select upto 4 different IPs.
> > There are 4 lanes in each J7200 SERDES. Define all
> > the possible functions in this file.
> > 
> > Cc: Peter Rosin <peda@...ntia.se>
> > Signed-off-by: Roger Quadros <rogerq@...com>
> > ---
> >  include/dt-bindings/mux/mux-j7200-wiz.h | 29 +++++++++++++++++++++++++
> >  1 file changed, 29 insertions(+)
> >  create mode 100644 include/dt-bindings/mux/mux-j7200-wiz.h
> > 
> > diff --git a/include/dt-bindings/mux/mux-j7200-wiz.h b/include/dt-bindings/mux/mux-j7200-wiz.h
> > new file mode 100644
> > index 000000000000..b091b1185a36
> > --- /dev/null
> > +++ b/include/dt-bindings/mux/mux-j7200-wiz.h
> > @@ -0,0 +1,29 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * This header provides constants for J7200 WIZ.
> > + */
> > +
> > +#ifndef _DT_BINDINGS_J7200_WIZ
> > +#define _DT_BINDINGS_J7200_WIZ
> > +
> > +#define SERDES0_LANE0_QSGMII_LANE3	0x0
> > +#define SERDES0_LANE0_PCIE1_LANE0	0x1
> > +#define SERDES0_LANE0_IP3_UNUSED	0x2
> > +#define SERDES0_LANE0_IP4_UNUSED	0x3
> > +
> > +#define SERDES0_LANE1_QSGMII_LANE4	0x0
> > +#define SERDES0_LANE1_PCIE1_LANE1	0x1
> > +#define SERDES0_LANE1_IP3_UNUSED	0x2
> > +#define SERDES0_LANE1_IP4_UNUSED	0x3
> > +
> > +#define SERDES0_LANE2_QSGMII_LANE1	0x0
> > +#define SERDES0_LANE2_PCIE1_LANE2	0x1
> > +#define SERDES0_LANE2_IP3_UNUSED	0x2
> > +#define SERDES0_LANE2_IP4_UNUSED	0x3
> > +
> > +#define SERDES0_LANE3_QSGMII_LANE2	0x0
> > +#define SERDES0_LANE3_PCIE1_LANE3	0x1
> > +#define SERDES0_LANE3_USB		0x2
> > +#define SERDES0_LANE3_IP4_UNUSED	0x3
> > +
> > +#endif /* _DT_BINDINGS_J7200_WIZ */
> 
> Should not the defines start with J7200_WIZ? SERDES0 seems like a too
> generic prefix, at least to me.

Thanks, good point. I am not sure if WIZ should even be used.. It is
a TI internal prefix for various serdes solutions, but I agree that
SERDES0 is too generic a terminology. That said, we should cleanup
include/dt-bindings/mux/mux-j721e-wiz.h as well, prior to introducing
j7200 changes.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ