linux-kernel - Re: [PATCH] clk: rockchip: Fix overflow rate during fractional approximation

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Message-ID: <CAMty3ZAtZr_OoEVQxP-YdqLeT4SUbz6BqBGd9fZmrsVROS+xxw@mail.gmail.com>
Date:   Wed, 16 Sep 2020 17:46:06 +0530
From:   Jagan Teki <jagan@...rulasolutions.com>
To:     "elaine.zhang" <zhangqing@...k-chips.com>
Cc:     Finley Xiao <finley.xiao@...k-chips.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Heiko Stuebner <heiko@...ech.de>,
        张晴 <elaine.zhang@...k-chips.com>,
        linux-clk <linux-clk@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-amarula <linux-amarula@...rulasolutions.com>
Subject: Re: [PATCH] clk: rockchip: Fix overflow rate during fractional approximation

Hi,

On Tue, Sep 15, 2020 at 7:10 AM elaine.zhang <zhangqing@...k-chips.com> wrote:
>
> hi,
>
> We have two submissions which I hope will be helpful to you.
>
> https://patchwork.kernel.org/patch/11272465/
> https://patchwork.kernel.org/patch/11272471/

I can see this, I have reconstructed the fractional divider handling
for px30 instead of all rockchiip platforms, is it okay to send
px30-alone fractional div handling support?


>
>
> A few more notes:
> 1. DCLK does not recommend the use of fractional frequency divider.
> Generally, DCLK will monopolize a PLL, and the relationship between DCLK
> frequency and PLL frequency is 1:1.
> 2, half-div, not all SOC support, detailed need to see TRM.

Can you point me the Page number on TRM?

Jagan.