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Message-ID: <d6dddab0-47aa-ddf2-959b-85493b8da52d@nvidia.com>
Date: Wed, 16 Sep 2020 16:58:20 +0100
From: Jon Hunter <jonathanh@...dia.com>
To: Marc Zyngier <maz@...nel.org>
CC: Sumit Garg <sumit.garg@...aro.org>, <linus.walleij@...aro.org>,
"Florian Fainelli" <f.fainelli@...il.com>,
Russell King <linux@....linux.org.uk>,
Jason Cooper <jason@...edaemon.net>,
Saravana Kannan <saravanak@...gle.com>,
Andrew Lunn <andrew@...n.ch>,
Catalin Marinas <catalin.marinas@....com>,
Gregory Clement <gregory.clement@...tlin.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
<linux-kernel@...r.kernel.org>,
"Krzysztof Kozlowski" <krzk@...nel.org>,
Will Deacon <will@...nel.org>,
"'Linux Samsung SOC'" <linux-samsung-soc@...r.kernel.org>,
linux-tegra <linux-tegra@...r.kernel.org>,
Thomas Gleixner <tglx@...utronix.de>,
<kernel-team@...roid.com>,
Valentin Schneider <Valentin.Schneider@....com>,
<linux-arm-kernel@...ts.infradead.org>,
Marek Szyprowski <m.szyprowski@...sung.com>
Subject: Re: [PATCH v3 08/16] irqchip/gic: Configure SGIs as standard
interrupts
On 16/09/2020 16:55, Marc Zyngier wrote:
> On 2020-09-16 16:46, Jon Hunter wrote:
>> On 16/09/2020 16:10, Marc Zyngier wrote:
>>> Hi Jon,
>>>
>>> +Linus, who is facing a similar issue.
>>>
>>> On 2020-09-16 15:16, Jon Hunter wrote:
>>>> Hi Marc,
>>>>
>>>> On 14/09/2020 14:06, Marek Szyprowski wrote:
>>>>> Hi Marc,
>>>>>
>>>>> On 01.09.2020 16:43, Marc Zyngier wrote:
>>>>>> Change the way we deal with GIC SGIs by turning them into proper
>>>>>> IRQs, and calling into the arch code to register the interrupt range
>>>>>> instead of a callback.
>>>>>>
>>>>>> Reviewed-by: Valentin Schneider <valentin.schneider@....com>
>>>>>> Signed-off-by: Marc Zyngier <maz@...nel.org>
>>>>> This patch landed in linux next-20200914 as commit ac063232d4b0
>>>>> ("irqchip/gic: Configure SGIs as standard interrupts"). Sadly it
>>>>> breaks
>>>>> booting of all Samsung Exynos 4210/4412 based boards (dual/quad ARM
>>>>> Cortex A9 based). Here are the last lines from the bootlog:
>>>>
>>>> I am observing the same thing on several Tegra boards (both arm and
>>>> arm64). Bisect is pointing to this commit. Reverting this alone does
>>>> not
>>>> appear to be enough to fix the issue.
>>>
>>> Right, I am just massively by the GICv3 spec, and failed to remember
>>> that ye olde GIC exposes the source CPU in AIR *and* wants it back,
>>> while
>>> newer GICs deal with that transparently.
>>>
>>> Can you try the patch below and let me know?
>>
>> Yes will do.
>>
>>> @@ -365,14 +354,13 @@ static void __exception_irq_entry
>>> gic_handle_irq(struct pt_regs *regs)
>>> smp_rmb();
>>>
>>> /*
>>> - * Samsung's funky GIC encodes the source CPU in
>>> - * GICC_IAR, leading to the deactivation to fail if
>>> - * not written back as is to GICC_EOI. Stash the
>>> - * INTID away for gic_eoi_irq() to write back.
>>> - * This only works because we don't nest SGIs...
>>> + * The GIC encodes the source CPU in GICC_IAR,
>>> + * leading to the deactivation to fail if not
>>> + * written back as is to GICC_EOI. Stash the INTID
>>> + * away for gic_eoi_irq() to write back. This only
>>> + * works because we don't nest SGIs...
>>> */
>>> - if (is_frankengic())
>>> - set_sgi_intid(irqstat);
>>> + this_cpu_write(sgi_intid, intid);
>>
>> I assume that it should be irqstat here and not intid?
>
> Indeed. As you can tell, I haven't even tried to compile it, sorry about
> that.
No worries, I got the gist. However, even with this change, it still
does not boot :-(
Jon
--
nvpublic
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