linux-kernel - [PATCH v2 2/2] bus: fsl-mc: MC control registers are not always available

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-Id: <20200916105213.18625-2-laurentiu.tudor@nxp.com>
Date:   Wed, 16 Sep 2020 13:52:13 +0300
From:   Laurentiu Tudor <laurentiu.tudor@....com>
To:     linux-kernel@...r.kernel.org, gregkh@...uxfoundation.org
Cc:     diana.craciun@....com, ioana.ciornei@....com,
        anda-alexandra.dorneanu@....com,
        Laurentiu Tudor <laurentiu.tudor@....com>
Subject: [PATCH v2 2/2] bus: fsl-mc: MC control registers are not always available

As per the device tree binding, in certain scenarios such as
virtualization scenarios, the MC control registers are not
available so don't error out if they are not present.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@....com>
---
Changes in v2:
 - dropped useless NULL check
 - restore IS_ERR() usage

 drivers/bus/fsl-mc/fsl-mc-bus.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/bus/fsl-mc/fsl-mc-bus.c b/drivers/bus/fsl-mc/fsl-mc-bus.c
index b0449df117e8..b4177eccbf50 100644
--- a/drivers/bus/fsl-mc/fsl-mc-bus.c
+++ b/drivers/bus/fsl-mc/fsl-mc-bus.c
@@ -916,10 +916,9 @@ static int fsl_mc_bus_probe(struct platform_device *pdev)
 
 	plat_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 	mc->fsl_mc_regs = devm_ioremap_resource(&pdev->dev, plat_res);
-	if (IS_ERR(mc->fsl_mc_regs))
-		return PTR_ERR(mc->fsl_mc_regs);
 
-	if (IS_ENABLED(CONFIG_ACPI) && !dev_of_node(&pdev->dev)) {
+	if (!IS_ERR(mc->fsl_mc_regs) && IS_ENABLED(CONFIG_ACPI) &&
+	    !dev_of_node(&pdev->dev)) {
 		mc_stream_id = readl(mc->fsl_mc_regs + FSL_MC_FAPR);
 		/*
 		 * HW ORs the PL and BMT bit, places the result in bit 15 of
-- 
2.17.1