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Message-Id: <20200916132000.1850-1-manivannan.sadhasivam@linaro.org>
Date:   Wed, 16 Sep 2020 18:49:55 +0530
From:   Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To:     agross@...nel.org, bjorn.andersson@...aro.org, kishon@...com,
        vkoul@...nel.org, robh@...nel.org
Cc:     svarbanov@...sol.com, bhelgaas@...gle.com,
        lorenzo.pieralisi@....com, linux-arm-msm@...r.kernel.org,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        mgautam@...eaurora.org, devicetree@...r.kernel.org,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Subject: [PATCH 0/5] Add PCIe support for SM8250 SoC

Hello,

This series adds PCIe support for Qualcomm SM8250 SoC with relevant PHYs.
There are 3 PCIe instances on this SoC each with different PHYs. The PCIe
controller and PHYs are mostly comaptible with the ones found on SDM845
SoC, hence the old drivers are modified to add the support.

This series has been tested on RB5 board with QCA6390 chipset connected
onboard.

Note: The dts patches will be submitted later once driver bits got applied!

Thanks,
Mani

Manivannan Sadhasivam (5):
  dt-bindings: phy: qcom,qmp: Document SM8250 PCIe PHY bindings
  phy: qualcomm: phy-qcom-qmp: Add PCIe PHY support for SM8250 SoC
  dt-bindings: pci: qcom: Document PCIe bindings for SM8250 SoC
  pci: controller: dwc: qcom: Add PCIe support for SM8250 SoC
  pci: controller: dwc: qcom: Harcode PCIe config SID

 .../devicetree/bindings/pci/qcom,pcie.txt     |   5 +-
 .../devicetree/bindings/phy/qcom,qmp-phy.yaml |   5 +
 drivers/pci/controller/dwc/pcie-qcom.c        |  11 +
 drivers/phy/qualcomm/phy-qcom-qmp.c           | 297 ++++++++++++++++++
 drivers/phy/qualcomm/phy-qcom-qmp.h           |  18 ++
 5 files changed, 334 insertions(+), 2 deletions(-)

-- 
2.17.1

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