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Date:   Wed, 16 Sep 2020 17:04:59 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc:     agross@...nel.org, bjorn.andersson@...aro.org, kishon@...com,
        vkoul@...nel.org, robh@...nel.org, svarbanov@...sol.com,
        bhelgaas@...gle.com, lorenzo.pieralisi@....com,
        linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org, mgautam@...eaurora.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH 4/5] pci: controller: dwc: qcom: Add PCIe support for
 SM8250 SoC

On Wed, Sep 16, 2020 at 06:49:59PM +0530, Manivannan Sadhasivam wrote:
> The PCIe IP on SM8250 SoC is similar to the one used on SDM845. Hence
> the support is added reusing the 2.7.0 ops. Only difference is the need
> of ATU base, which will be fetched opionally if provided by DT/ACPI.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>

s/opionally/optionally/

  $ git log --oneline drivers/pci/controller/dwc/pcie-qcom.c | head -10
  824001cb64c0 PCI: qcom: Replace define with standard value
  51ed2c2b6026 PCI: qcom: Support pci speed set for ipq806x
  8df093fe2ae1 PCI: qcom: Add ipq8064 rev2 variant
  de3c4bf64897 PCI: qcom: Add support for tx term offset for rev 2.1.0
  5149901e9e6d PCI: qcom: Define some PARF params needed for ipq8064 SoC
  6a114526af46 PCI: qcom: Use bulk clk api and assert on error
  ee367e2cdd22 PCI: qcom: Add missing reset for ipq806x
  dd58318c019f PCI: qcom: Change duplicate PCI reset to phy reset

Make yours match, maybe like this:

  PCI: qcom: Add SM8250 SoC support

That way the important information ("SM8250") isn't way at the end
where it may get chopped off.

If you're ambitious, do this for the non-PCI patches, too.

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