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Message-Id: <1600224517-31465-3-git-send-email-peng.fan@nxp.com>
Date:   Wed, 16 Sep 2020 10:48:35 +0800
From:   peng.fan@....com
To:     shawnguo@...nel.org, s.hauer@...gutronix.de, festevam@...il.com,
        abel.vesa@....com, robh+dt@...nel.org
Cc:     kernel@...gutronix.de, linux-imx@....com, Anson.Huang@....com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        aisheng.dong@....com, devicetree@...r.kernel.org,
        Peng Fan <peng.fan@....com>
Subject: [PATCH V2 2/4] ARM: dts: imx7ulp: add pmc node

From: Peng Fan <peng.fan@....com>

Add i.MX7ULP pmc node for m4 and a7.

Signed-off-by: Peng Fan <peng.fan@....com>
---
 arch/arm/boot/dts/imx7ulp.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index b7ea37ad4e55..b02dc4c97fb8 100644
--- a/arch/arm/boot/dts/imx7ulp.dtsi
+++ b/arch/arm/boot/dts/imx7ulp.dtsi
@@ -286,6 +286,11 @@ pcc2: clock-controller@...f0000 {
 			assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
 		};
 
+		pmc1: pmc1@...00000 {
+			compatible = "fsl,imx7ulp-pmc1";
+			reg = <0x40400000 0x1000>;
+		};
+
 		smc1: clock-controller@...10000 {
 			compatible = "fsl,imx7ulp-smc1";
 			reg = <0x40410000 0x1000>;
@@ -447,6 +452,11 @@ m4aips1: bus@...80000 {
 		reg = <0x41080000 0x80000>;
 		ranges;
 
+		pmc0: pmc0@...a1000 {
+			compatible = "fsl,imx7ulp-pmc0";
+			reg = <0x410a1000 0x1000>;
+		};
+
 		sim: sim@...a3000 {
 			compatible = "fsl,imx7ulp-sim", "syscon";
 			reg = <0x410a3000 0x1000>;
-- 
2.28.0

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