linux-kernel - Re: [PATCH RFC] KVM: x86: emulate wait-for-SIPI and SIPI-VMExit

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Message-ID: <c3eaf796-67f1-9224-3e16-72d93501b6cf@redhat.com>
Date:   Thu, 17 Sep 2020 10:56:18 +0200
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     yadong.qi@...el.com, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, x86@...nel.org
Cc:     sean.j.christopherson@...el.com, vkuznets@...hat.com,
        wanpengli@...cent.com, jmattson@...gle.com, joro@...tes.org,
        tglx@...utronix.de, mingo@...hat.com, bp@...en8.de, hpa@...or.com,
        liran.alon@...cle.com, nikita.leshchenko@...cle.com,
        chao.gao@...el.com, kevin.tian@...el.com, luhai.chen@...el.com,
        bing.zhu@...el.com, kai.z.wang@...el.com
Subject: Re: [PATCH RFC] KVM: x86: emulate wait-for-SIPI and SIPI-VMExit

On 17/09/20 04:25, yadong.qi@...el.com wrote:
> From: Yadong Qi <yadong.qi@...el.com>
> 
> Background: We have a lightweight HV, it needs INIT-VMExit and
> SIPI-VMExit to wake-up APs for guests since it do not monitoring
> the Local APIC. But currently virtual wait-for-SIPI(WFS) state
> is not supported in KVM, so when running on top of KVM, the L1
> HV cannot receive the INIT-VMExit and SIPI-VMExit which cause
> the L2 guest cannot wake up the APs.
> 
> This patch is incomplete, it emulated wait-for-SIPI state by halt
> the vCPU and emulated SIPI-VMExit to L1 when trapped SIPI signal
> from L2. I am posting it RFC to gauge whether or not upstream
> KVM is interested in emulating wait-for-SIPI state before
> investing the time to finish the full support.

Yes, the patch makes sense and is a good addition.  What exactly is
missing?  (Apart from test cases in kvm-unit-tests!)

Paolo

> According to Intel SDM Chapter 25.2 Other Causes of VM Exits,
> SIPIs cause VM exits when a logical processor is in
> wait-for-SIPI state.
> 
> In this patch:
>     1. introduce SIPI exit reason,
>     2. introduce wait-for-SIPI state for nVMX,
>     3. advertise wait-for-SIPI support to guest.
> 
> When L1 hypervisor is not monitoring Local APIC, L0 need to emulate
> INIT-VMExit and SIPI-VMExit to L1 to emulate INIT-SIPI-SIPI for
> L2. L2 LAPIC write would be traped by L0 Hypervisor(KVM), L0 should
> emulate the INIT/SIPI vmexit to L1 hypervisor to set proper state
> for L2's vcpu state.