linux-kernel - Re: [PATCH v3 1/6] dt-bindings: mux-j7200-wiz: Add lane function defines

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Message-ID: <8a27f8f3-20c4-f72c-b683-81153107d867@ti.com>
Date:   Thu, 17 Sep 2020 15:47:56 +0530
From:   Kishon Vijay Abraham I <kishon@...com>
To:     Nishanth Menon <nm@...com>, Peter Rosin <peda@...ntia.se>
CC:     Roger Quadros <rogerq@...com>, <t-kristo@...com>,
        <robh+dt@...nel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <nsekhar@...com>
Subject: Re: [PATCH v3 1/6] dt-bindings: mux-j7200-wiz: Add lane function
 defines

Nishanth,

On 16/09/20 9:15 pm, Nishanth Menon wrote:
> On 06:52-20200916, Peter Rosin wrote:
>> Hi,
>>
>> Sorry for the delay.
>>
>> On 2020-09-15 13:20, Roger Quadros wrote:
>>> Each SERDES lane mux can select upto 4 different IPs.
>>> There are 4 lanes in each J7200 SERDES. Define all
>>> the possible functions in this file.
>>>
>>> Cc: Peter Rosin <peda@...ntia.se>
>>> Signed-off-by: Roger Quadros <rogerq@...com>
>>> ---
>>>  include/dt-bindings/mux/mux-j7200-wiz.h | 29 +++++++++++++++++++++++++
>>>  1 file changed, 29 insertions(+)
>>>  create mode 100644 include/dt-bindings/mux/mux-j7200-wiz.h
>>>
>>> diff --git a/include/dt-bindings/mux/mux-j7200-wiz.h b/include/dt-bindings/mux/mux-j7200-wiz.h
>>> new file mode 100644
>>> index 000000000000..b091b1185a36
>>> --- /dev/null
>>> +++ b/include/dt-bindings/mux/mux-j7200-wiz.h
>>> @@ -0,0 +1,29 @@
>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>> +/*
>>> + * This header provides constants for J7200 WIZ.
>>> + */
>>> +
>>> +#ifndef _DT_BINDINGS_J7200_WIZ
>>> +#define _DT_BINDINGS_J7200_WIZ
>>> +
>>> +#define SERDES0_LANE0_QSGMII_LANE3	0x0
>>> +#define SERDES0_LANE0_PCIE1_LANE0	0x1
>>> +#define SERDES0_LANE0_IP3_UNUSED	0x2
>>> +#define SERDES0_LANE0_IP4_UNUSED	0x3
>>> +
>>> +#define SERDES0_LANE1_QSGMII_LANE4	0x0
>>> +#define SERDES0_LANE1_PCIE1_LANE1	0x1
>>> +#define SERDES0_LANE1_IP3_UNUSED	0x2
>>> +#define SERDES0_LANE1_IP4_UNUSED	0x3
>>> +
>>> +#define SERDES0_LANE2_QSGMII_LANE1	0x0
>>> +#define SERDES0_LANE2_PCIE1_LANE2	0x1
>>> +#define SERDES0_LANE2_IP3_UNUSED	0x2
>>> +#define SERDES0_LANE2_IP4_UNUSED	0x3
>>> +
>>> +#define SERDES0_LANE3_QSGMII_LANE2	0x0
>>> +#define SERDES0_LANE3_PCIE1_LANE3	0x1
>>> +#define SERDES0_LANE3_USB		0x2
>>> +#define SERDES0_LANE3_IP4_UNUSED	0x3
>>> +
>>> +#endif /* _DT_BINDINGS_J7200_WIZ */
>>
>> Should not the defines start with J7200_WIZ? SERDES0 seems like a too
>> generic prefix, at least to me.
> 
> Thanks, good point. I am not sure if WIZ should even be used.. It is
> a TI internal prefix for various serdes solutions, but I agree that
> SERDES0 is too generic a terminology. That said, we should cleanup
> include/dt-bindings/mux/mux-j721e-wiz.h as well, prior to introducing
> j7200 changes.

WIZ is defined in public TRM (https://www.ti.com/lit/pdf/spruiu1).
"
The SERDES mux (WIZ) module supports the following features:
*) Multiplexes device interfaces onto a single SERDES lane (Tx and Rx)
*) Provides registers to implement SERDES control and status functions
and alignment delays
.
.
"

Thanks
Kishon