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Message-ID: <20200917014426.GB22566@Asurada-Nvidia>
Date: Wed, 16 Sep 2020 18:44:27 -0700
From: Nicolin Chen <nicoleotsuka@...il.com>
To: Shengjiu Wang <shengjiu.wang@....com>
Cc: timur@...nel.org, Xiubo.Lee@...il.com, festevam@...il.com,
broonie@...nel.org, perex@...ex.cz, tiwai@...e.com,
alsa-devel@...a-project.org, lgirdwood@...il.com,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] ASoC: fsl_sai: Add new added registers and new bit
definition
On Wed, Sep 16, 2020 at 06:16:25PM +0800, Shengjiu Wang wrote:
> On i.MX850/i.MX815/i.MX845 platform, the sai IP is upgraded.
> There are some new registers and new bit definition. This
> patch is to complete the register list.
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@....com>
Change itself looks good.
Can add once fixing the commit message:
Acked-by: Nicolin Chen <nicoleotsuka@...il.com>
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