linux-kernel - Re: [PATCH 3/3 v4] KVM: SVM: Don't flush cache if hardware enforces cache coherency across encryption domains

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20200918075651.GC6585@zn.tnic>
Date:   Fri, 18 Sep 2020 09:56:51 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Krish Sadhukhan <krish.sadhukhan@...cle.com>,
        Paolo Bonzini <pbonzini@...hat.com>
Cc:     kvm@...r.kernel.org, pbonzini@...hat.com, jmattson@...gle.com,
        tglx@...utronix.de, mingo@...hat.com, x86@...nel.org,
        sean.j.christopherson@...el.com, vkuznets@...hat.com,
        wanpengli@...cent.com, joro@...tes.org,
        dave.hansen@...ux.intel.com, luto@...nel.org, peterz@...radead.org,
        linux-kernel@...r.kernel.org, hpa@...or.com
Subject: Re: [PATCH 3/3 v4] KVM: SVM: Don't flush cache if hardware enforces
 cache coherency across encryption domains

On Thu, Sep 17, 2020 at 09:20:38PM +0000, Krish Sadhukhan wrote:
> In some hardware implementations, coherency between the encrypted and
> unencrypted mappings of the same physical page in a VM is enforced. In such a
> system, it is not required for software to flush the VM's page from all CPU
> caches in the system prior to changing the value of the C-bit for the page.
> 
> Signed-off-by: Krish Sadhukhan <krish.sadhukhan@...cle.com>
> ---
>  arch/x86/kvm/svm/sev.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
> index 7bf7bf734979..3c9a45efdd4d 100644
> --- a/arch/x86/kvm/svm/sev.c
> +++ b/arch/x86/kvm/svm/sev.c
> @@ -384,7 +384,8 @@ static void sev_clflush_pages(struct page *pages[], unsigned long npages)
>  	uint8_t *page_virtual;
>  	unsigned long i;
>  
> -	if (npages == 0 || pages == NULL)
> +	if (this_cpu_has(X86_FEATURE_SME_COHERENT) || npages == 0 ||
> +	    pages == NULL)
>  		return;
>  
>  	for (i = 0; i < npages; i++) {
> -- 

Took the first two, Paolo lemme know if I should route this one through
tip too.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette