linux-kernel - Re: [PATCH v2 7/9] clocksource: sp804: add support for Hisilicon sp804 timer

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <5efc0de3-754b-2b48-7769-d9ac7f5e21b0@linaro.org>
Date:   Fri, 18 Sep 2020 10:53:25 +0200
From:   Daniel Lezcano <daniel.lezcano@...aro.org>
To:     Zhen Lei <thunder.leizhen@...wei.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        linux-kernel <linux-kernel@...r.kernel.org>
Cc:     Libin <huawei.libin@...wei.com>,
        Kefeng Wang <wangkefeng.wang@...wei.com>,
        Jianguo Chen <chenjianguo3@...wei.com>
Subject: Re: [PATCH v2 7/9] clocksource: sp804: add support for Hisilicon
 sp804 timer

On 12/09/2020 13:45, Zhen Lei wrote:
> The ARM SP804 supports a maximum of 32-bit counter, but Hisilicon extends
> it to 64-bit. That means, the registers: TimerXload, TimerXValue and
> TimerXBGLoad are 64bits, all other registers are the same as those in the
> SP804. The driver code can be completely reused except that the register
> offset is different.
> 
> Use compatible = "hisilicon,sp804" mark as Hisilicon sp804 timer.
> 
> Signed-off-by: Zhen Lei <thunder.leizhen@...wei.com>
> ---
>  drivers/clocksource/timer-sp.h    | 12 ++++++++++++
>  drivers/clocksource/timer-sp804.c | 15 +++++++++++++++
>  2 files changed, 27 insertions(+)
> 
> diff --git a/drivers/clocksource/timer-sp.h b/drivers/clocksource/timer-sp.h
> index 1ab75cbed0e0..6ca8d82e8544 100644
> --- a/drivers/clocksource/timer-sp.h
> +++ b/drivers/clocksource/timer-sp.h
> @@ -31,6 +31,18 @@
>  #define TIMER_MIS	0x14			/*  CVR ro */
>  #define TIMER_BGLOAD	0x18			/*  CVR rw */
>  
> +
> +#define HISI_TIMER_1_BASE	0x00
> +#define HISI_TIMER_2_BASE	0x40
> +#define HISI_TIMER_LOAD		0x00
> +#define HISI_TIMER_VALUE	0x08
> +#define HISI_TIMER_CTRL		0x10
> +#define HISI_TIMER_INTCLR	0x14
> +#define HISI_TIMER_RIS		0x18
> +#define HISI_TIMER_MIS		0x1c
> +#define HISI_TIMER_BGLOAD	0x20

Why not put them in timer-sp804.c directly ?

[ ... ]

-- 
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog