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Message-Id: <20200918112942.1367-6-matthias.schiffer@ew.tq-group.com>
Date: Fri, 18 Sep 2020 13:29:35 +0200
From: Matthias Schiffer <matthias.schiffer@...tq-group.com>
To: Rob Herring <robh+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>
Cc: Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Matthias Schiffer <matthias.schiffer@...tq-group.com>
Subject: [PATCH 06/13] ARM: dts: imx7-mba7: disable ethernet PHY clock outputs
The clock outputs are not connected. Disable them to improve EMI
behaviour.
Signed-off-by: Matthias Schiffer <matthias.schiffer@...tq-group.com>
---
arch/arm/boot/dts/imx7-mba7.dtsi | 1 +
arch/arm/boot/dts/imx7d-mba7.dts | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx7-mba7.dtsi b/arch/arm/boot/dts/imx7-mba7.dtsi
index 1af40032ab17..9be225bb135a 100644
--- a/arch/arm/boot/dts/imx7-mba7.dtsi
+++ b/arch/arm/boot/dts/imx7-mba7.dtsi
@@ -212,6 +212,7 @@
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
};
};
diff --git a/arch/arm/boot/dts/imx7d-mba7.dts b/arch/arm/boot/dts/imx7d-mba7.dts
index 1101be373ddf..5ef86de53013 100644
--- a/arch/arm/boot/dts/imx7d-mba7.dts
+++ b/arch/arm/boot/dts/imx7d-mba7.dts
@@ -39,6 +39,7 @@
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_50_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
};
};
};
--
2.17.1
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