linux-kernel - Re: [PATCH] net: phy: realtek: fix rtl8211e rx/tx delay config

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Message-ID: <20200921151234.GC3717417@lunn.ch>
Date:   Mon, 21 Sep 2020 17:12:34 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     劉偉權 <willy.liu@...ltek.com>
Cc:     Serge Semin <fancer.lancer@...il.com>,
        Kyle Evans <kevans@...eBSD.org>,
        "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "linux@...linux.org.uk" <linux@...linux.org.uk>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Ryan Kao <ryankao@...ltek.com>,
        Joe Hershberger <joe.hershberger@...com>,
        Peter Robinson <pbrobinson@...il.com>
Subject: Re: [PATCH] net: phy: realtek: fix rtl8211e rx/tx delay config

On Mon, Sep 21, 2020 at 07:00:00AM +0000, 劉偉權 wrote:
> Hi Andrew,

> I removed below register layout descriptions because these
> descriptions did not match register definitions for rtl8211e
> extension page 164 reg 0x1c at all.
> 8:6 = PHY Address
> 5:4 = Auto-Negotiation
> 3 = Mode
> 2 = RXD
> 1 = TXD
> 0 = SELRGV1

> I think it is a misunderstanding. These definitions are mapped from
> datasheet rtl8211e table13" Configuration Register
> Definition". However this table should be HW pin configurations not
> register descriptions.

So these are just how the device is strapped. So lets add that to the
description, rather than remove it.

> Users can config RXD/TXD via register setting(extension page 164 reg
> 0x1c). But bit map for these two settings should be below:
> 13 = Force Tx RX Delay controlled by bit12 bit11,
> 12 = RX Delay, 11 = TX Delay

> Hi Sergey,

> I saw the summary from https://reviews.freebsd.org/D13591. This
> patch is to reconfigure the RTL8211E used to force off TXD/RXD (RXD
> is defaulting to on, in my checks) and turn on some bits in the
> configuration register for this PHY that are undocumented.

> The default value for "extension pg 0xa4 reg 0x1c" is 0x8148, and
> bit1-2 should be 0. In my opinion, this patch should be worked based
> on the magic number (0xb400).

Magic numbers are always bad. Please document what these bits mean.

      Andrew