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Message-ID: <20200921203104.GA35580@epycbox.lan>
Date:   Mon, 21 Sep 2020 13:31:04 -0700
From:   Moritz Fischer <mdf@...nel.org>
To:     Krzysztof Kozlowski <krzk@...nel.org>
Cc:     Xu Yilun <yilun.xu@...el.com>, mdf@...nel.org,
        linux-fpga@...r.kernel.org, linux-kernel@...r.kernel.org,
        trix@...hat.com, lgoncalv@...hat.com,
        Russ Weight <russell.h.weight@...el.com>
Subject: Re: [PATCH v3] memory: dfl-emif: add the DFL EMIF private feature
 driver

Hi Krzysztof,

On Mon, Sep 21, 2020 at 09:23:11AM +0200, Krzysztof Kozlowski wrote:
> On Mon, Sep 21, 2020 at 01:31:20PM +0800, Xu Yilun wrote:
> > This driver is for the EMIF private feature implemented under FPGA
> > Device Feature List (DFL) framework. It is used to expose memory
> > interface status information as well as memory clearing control.
> > 
> > The purpose of memory clearing block is to zero out all private memory
> > when FPGA is to be reprogrammed. This gives users a reliable method to
> > prevent potential data leakage.
> > 
> > Signed-off-by: Xu Yilun <yilun.xu@...el.com>
> > Signed-off-by: Russ Weight <russell.h.weight@...el.com>
> > ---
> > v2: Adjust the position of this driver in Kconfig.
> >     Improves the name of the Kconfig option.
> >     Change the include dfl-bus.h to dfl.h, cause the previous patchset
> >      renames the file.
> >     Some minor fixes and comment improvement.
> > v3: Adjust the position of the driver in Makefile.
> > ---
> >  .../ABI/testing/sysfs-bus-dfl-devices-emif         |  25 +++
> >  drivers/memory/Kconfig                             |   9 +
> >  drivers/memory/Makefile                            |   2 +
> >  drivers/memory/dfl-emif.c                          | 207 +++++++++++++++++++++
> >  4 files changed, 243 insertions(+)
> >  create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-emif
> >  create mode 100644 drivers/memory/dfl-emif.c
> > 
> 
> Hi Moritz,
> 
> Since this depends on dfl patches, I would need a stable tag with them
> or you can take it directly:
> Acked-by: Krzysztof Kozlowski <krzk@...nel.org>
> 
> Best regards,
> Krzysztof

The FPGA patches go through Greg's tree. For the time being it's
probably easiest if I take the changes through my tree once Greg pulled
my tree.

Do you have any feedback to better handle this sort of subsystem
spanning changesets for me?

Thanks,
Moritz

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